//ICC-AVR application builder : 2008-10-7 10:35:42 // Target : M8 // Crystal: 8.0000Mhz
#include <iom8v.h> #include <macros.h> #define NONE 0 #define RD 1 #define WR 2 #define CT 10 #define true 1 #define false 0
unsigned char DATADR,WRINDEX,status,TWIS,OKF; unsigned char Count,tempdata,i,TEXT,m,n;
unsigned char EDID[256] = {
0x00,0xff,0xff,0xff,0xff,0xff,0xff,0x00, 0x32,0x6e,0x03,0x08,0x16,0x79,0x02,0x00, 0x2b,0x2b,0x01,0x03,0x81,0x1e,0x17,0xaa, 0xea,0xc1,0xe5,0xa3,0x57,0x4e,0x9c,0x23,
0x1d,0x50,0x54,0xbf,0xee,0x00,0x01,0x01, 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01, 0x01,0x01,0x01,0x01,0x01,0x01,0x64,0x19, 0x00,0x40,0x41,0x00,0x26,0x30,0x18,0x88,
0x36,0x00,0x33,0xe6,0x10,0x00,0x00,0x18, 0x00,0x00,0x00,0xff,0x00,0x20,0x42,0x5a, 0x20,0x20,0x31,0x36,0x32,0x30,0x37,0x30, 0x0a,0x20,0x00,0x00,0x00,0xfc,0x00,0x4c,
0x45,0x44,0x20,0x31,0x30,0x32,0x34,0x58, 0x37,0x36,0x38,0x0a,0x00,0x00,0x00,0xfd, 0x00,0x38,0x56,0x1e,0x45,0x0a,0x00,0x0a, 0x20,0x20,0x20,0x20,0x20,0x20,0x00,0xda,
0x02,0x03,0x19,0x01,0x4f,0x85,0x14,0x22, 0x04,0x13,0x11,0x12,0x02,0x03,0x06,0x07, 0x00,0x00,0x00,0x00,0x65,0x03,0x0c,0x00, 0x10,0x01,0x1d,0x00,0x72,0x51,0xd0,0x1e,
0x20,0x6e,0x28,0x55,0x00,0xc4,0x8e,0x21, 0x00,0x00,0x1e,0xd6,0x09,0x80,0xa0,0x20, 0xe0,0x2d,0x10,0x08,0x60,0x22,0x00,0x12, 0x8e,0x21,0x08,0x08,0x18,0x8c,0x0a,0xa0,
0x14,0x51,0xf0,0x16,0x00,0x26,0x7c,0x43, 0x00,0x13,0x8e,0x21,0x00,0x00,0x98,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1a };
void delay() { for(m=0;m<80;m++)//111 { for(n=0;n<4;n++) { n++; } } }
void port_init(void) { PORTB = 0xFF; DDRB = 0x00; PORTC = 0x7F; //m103 output only DDRC = 0x02;//0x02 PORTD = 0xFF; DDRD = 0x00; }
//Watchdog initialisation // prescale: 16K cycles void watchdog_init(void) { WDR(); //this prevents a timout on enabling WDTCR = 0x08; //WATCHDOG ENABLED - dont forget to issue WDRs }
//TIMER0 initialisation - prescale:1024 // WGM: Normal // desired value: 5mSec // actual value: 4.992mSec (0.2%) void timer0_init(void) { TCCR0 = 0x00; //stop TCNT0 = 0xD9; //set count TCCR0 = 0x05; //start timer }
#pragma interrupt_handler timer0_ovf_isr:10 void timer0_ovf_isr(void) { TCNT0 = 0xD9; //reload counter value }
void light(void) { PORTC &= 0xfd;//1111 1101 }
//TWI initialisation void twi_init(void) { TWCR= 0X00; //disable twi TWBR= 0x00; //set bit rate TWAR= 0xA0; //set slave address TWCR= 0xC5; //enable twi 0x45 TWSR &= 0xfe; }
#pragma interrupt_handler twi_isr:18 void twi_isr(void) { //twi event TWIS = TWSR & 0xf8;//读TWI状态字 switch(TWIS) { case 0x60:; case 0x68://被控接收,收到本机SLA+W,ACK已发出 status = WR; WRINDEX = 0; TWCR = 0x45; break; case 0x80:;//被控接收,已收到本机SLA+W,data已收到,ACK已发出 if(WRINDEX == 0) { //接收到第一写入数据为地址 DATADR = TWDR; WRINDEX = 1; } else { EDID[DATADR] = TWDR; DATADR++; } TWCR = 0x45; break; case 0xA0:;//被控接收,STOP或repeat start已收到 EDID[DATADR] = TWDR; WRINDEX = 0; status = NONE; TWCR = 0x45; //off(); break; case 0xA8:;//被控发送,收到本机SLA+R,ACK已发出 status = RD; TWDR = 0x0;//EDID[DATADR]; //TWDR = DATADR; DATADR++; TWCR = 0x45;//下一步发送最后一个,接收ACK信号 break; case 0xB8:;//被控发送,DATA发出,收到ACK信号
TWDR = EDID[DATADR]; //delay(); TWCR = 0xc5; DATADR++; break; case 0xC0:;//被控发送,data已发,收到NACK信号 //发送数据完成 TWCR = 0x45; status = NONE; break; case 0xC8:;//被控发送,最后一个data已发出(TWEA=0)收到ACK信号 //发送数据完成 TWCR = 0x45; break; case 0:;//被控发送,data已发,收到NACK信号 //TWSTO 置1 从错误状态恢复 TWAR= 0xA0; //set slave address TWCR |= 0x10;//0001 0000 status = NONE; break; } TWCR |= 0x80;//clear TWIINT flag }
//call this routine to initialise all peripherals void init_devices(void) { //stop errant interrupts until set up CLI(); //disable all interrupts port_init(); watchdog_init(); timer0_init(); twi_init();
MCUCR = 0x00; GICR = 0x00; TIMSK = 0x01; //timer interrupt sources SEI(); //re-enable interrupts //all peripherals are now initialised
}
void main() {
init_devices(); PORTC &= 0xfd; DATADR = 1; while(1) { WDR(); } } |