Byte Peripheral Interface (BPI) is a parallel configuration interface in which the FPGA acts as the "Master" device. The FPGA controls the address pins and PROM control signals to read configuration data from a Parallel PROM (most typically a FLASH-based device.) This is different from SelectMAP mode in that SelectMAP mode requires addresses to be generated externally to the FPGA (by a CPLD or external microprocessor).
In BPI mode, the FPGA configures itself from an industry-standard Parallel NOR Flash PROM. The FPGA generates up to 24-bit address lines to access an attached parallel flash. The BPI interface also functions with Xilinx® Parallel Platform Flash PROMs (XCFxxP), although the FPGA’s address lines are left unconnected.
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