以下是建立以及页表的程序:
static inline unsigned int initializeMMU()
{
unsigned int adat,rr2,rr3,i;
rr2 = 0xdfe;
adat = get_cr() & 0xfffffffe; //Read Control Register
asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" : : "r" (adat) : "cc"); //disable MMU
asm volatile("mcr p15, 0, %0, c7, c5, 0 @ set CR" : : "r" (0) : "cc"); //invalidate caches jay
asm volatile("mcr p15, 0, %0, c7, c5, 6 @ set CR" : : "r" (0) : "cc"); //clear the whole jump target of cache
asm volatile("mcr p15, 0, %0, c7, c5, 7 @ set CR" : : "r" (0) : "cc"); //invalidate VA from branch predictor array
asm("MRC p15, 0, %0, c1, c0, 1 @ get CR" : "=r" (adat) : : "cc"); //Read Auxiliary Control Register
adat &= 0x3d;
asm volatile("mcr p15, 0, %0, c1, c0, 1 @ set CR" : : "r" (adat) : "cc"); //disable L2
asm volatile("mcr p15, 0, %0, c8, c7, 0 @ set CR" : : "r" (0) : "cc"); //invalidate TLBs //Invalidate Inst-TLB and Data-TLB
asm volatile("mcr p15, 0, %0, c2, c0, 2 @ set CR" : : "r" (0) : "cc"); //selected table reg 0 //Write Translation Table Base Control Register
asm volatile("mcr p15, 0, %0, c2, c0, 0 @ set CR" : : "r" (0x80000000) : "cc"); //set start of translation table //Write Translation Table Base Register
for( i=0;i<0x400;i++ ) //initialize the nand space page table (0 - 0x3fffffff)
{
rr3 = (rr2 | ( i<<20 ));
(*(volatile unsigned int*)(0x80000000+(i<<2))) = rr3;
}
for( i=0x400;i<0x800;i++ ) //initialize the on-chip Memory space page table (0x40000000 - 0x7fffffff)
{
rr3 = (rr2 | ( i<<20 )) & 0xfffffff2;
(*(volatile unsigned int*)(0x80000000+(i<<2))) = rr3;
}
rr3 = (rr2 | ( 0x800<<20 ));
(*(volatile unsigned int*)(0x80000000+(0x800<<2))) = rr3 & 0xfffff01f; //initialize the store page table space in the sdram (0x80000000 - 0x80100000)
for( i=0x801;i<0x900;i++ ) //initialize the SDRAM main address space(SMS) page table (0x80000000 - 0xbfffffff)
{
rr3 = rr2 | ( i<<20 );
(*(volatile unsigned int*)(0x80000000+(i<<2))) = rr3;
}
asm volatile("mcr p15, 0, %0, c3, c0, 0 @ set CR" : : "r" (0xfffffffd) : "cc"); //Setup domain control register Enable all domains to client mode //Write Domain Access Control Register
asm("MRC p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (adat) : : "cc"); //read CP15 register 1 into adat
//adat &= ~((1<<12)|(1<<2)); //disable icache and dcache
adat |= 1 | (1<<12) | (1<<2);
asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" : : "r" (adat) : "cc");
} |