路过上堂《模拟电路》课,正统的那种,且以下帖为例:
https://bbs.21ic.com/icview-587216-1-2.html
先确定如何从一般电路图(有源器件已采用等效模型替代)中得到交流分量图。基本步骤可概括为一句话——去除所有直流偏置(含信号直流分量)。具体为
1)短路所有独立电压源
2)开路所有独立电流源
3)短路所有可忽略的耦合或旁路电容
4)开路所有可忽略的扼流电感等
....
有了这些,开始分析所提帖中的两例
一)漏极分别接电源和理想电流源的那个差分对
不用分析便知其交流输出为(其中Ui1为漏极接电源的那个管子的输入,Ui2为另一输入端)
Uo = gm ro (Ui1 - Ui2)
因为差分对输出的一端接电源(交流接地),而另一端接电流源(交流开路)。套用“公式”直接可得结果。
当然,如果这样就完事了,那未免太忽悠人了。下面来点“实在”的,给出分析——即方程。
Id1 = gm1 (Ui1 - Us)
Id2 = gm2 (Ui2 - Us)
Us-Uo = Id2 ro2
Us = Id1 ro1
设两管特性一致,且Ui1接近Ui2,则可认为gm1≈gm2=gm,ro1=ro2=ro。解得
Uo = gm ro (Ui1 - Ui2)
二)相关首帖电路(理解为NMOS)
直接给方程
Id1 = gm1 (Ui1 - Us)
Id2 = gm2 (Ui2 - Us)
Id3 = gm3 (Uo - Us3)
Us - Uo = Id2 ro2
Us - Us3 = Id1 ro1
Us3 = Id3 ro3
同样设差分管特性一致,且Ui1接近Ui2,则可认为gm1≈gm2=gm,ro1=ro2=ro。解得
Uo = gm ro (1 + gm3 ro3) (Ui1 - Ui2)
注意,上述分析都是低频交流分量的分析。
最后,引段文字作为结束
At the circuit structure and stage topology development it is most important to develop the “feeling”, or intuitive understanding of the circuit operation and its main features. Such feeling allows the designer to choose the direction for improvement of the structure or the circuit, and to evaluate multiple choices in an acceptable time. There can be no innovation or a significant advance without such a feeling.
At the structural level this feeling comes from the preceding analysis of the operation of the general structures, such as one-dimensional system with a single feedback loop, and from the analysis of the general differential structure with common-mode feedback (Appendix) for the multidimensional systems.
At the circuit topology design level this feeling is based on understanding of the operation of components and elementary cells like differential stage or current mirror. How deep should we study and keep in memory the operation of these components and cells?
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