代码如下：
其中clk和从in.txt读入的数据都是对的，从modelsim上都可以看出来，就是中间一段的process中GPS_PULSE和aclr没有执行，从波形上看一直是高‘1’。不知道怎么回事，编译没有错误
LIBRARY ieee;
--use ieee.numeric_std.all;
USE ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_textio.all;
library std;
USE STD.TEXTIO.ALL;
ENTITY pncodesearch_vhd_tst IS
END pncodesearch_vhd_tst;
ARCHITECTURE pncodesearch_arch OF pncodesearch_vhd_tst IS
-- constants
constant ClockPeriod : TIME := 40 ns;
-- signals
--type LINE is access integer;
SIGNAL aclr : STD_LOGIC;
SIGNAL acq : STD_LOGIC_VECTOR(1 DOWNTO 0);
SIGNAL catched : STD_LOGIC;
SIGNAL clk : STD_LOGIC;
SIGNAL d : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL dout : STD_LOGIC_VECTOR(35 DOWNTO 0);
SIGNAL GPS_PULSE : STD_LOGIC;
SIGNAL matched : STD_LOGIC;
SIGNAL pnoffset : STD_LOGIC_VECTOR(15 DOWNTO 0);
COMPONENT pncodesearch
PORT (
aclr : IN STD_LOGIC;
acq : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
catched : OUT STD_LOGIC;
clk : IN STD_LOGIC;
d : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
dout : OUT STD_LOGIC_VECTOR(35 DOWNTO 0);
GPS_PULSE : IN STD_LOGIC;
matched : OUT STD_LOGIC;
pnoffset : OUT STD_LOGIC_VECTOR(15 DOWNTO 0)
);
END COMPONENT;
BEGIN
i1 : pncodesearch
PORT MAP (
-- list connections between master ports and signals
aclr => aclr,
acq => acq,
catched => catched,
clk => clk,
d => d,
dout => dout,
GPS_PULSE => GPS_PULSE,
matched => matched,
pnoffset => pnoffset
);
--clk <= not clk after ClockPeriod / 2;
clkgen: process
begin
wait for (ClockPeriod / 2);
clk <= '1';
wait for (ClockPeriod / 2);
clk <= '0';
end process;
init :process
-- variable declarations
begin
GPS_PULSE <= '1';
aclr <= '1';
wait for 40 ns;
GPS_PULSE <= '0';
aclr <= '0';
end process ; -- code that executes only once
always : PROCESS
-- optional sensitivity list
-- ( )
-- variable declarations
FILE inputfile: TEXT open read_mode is "D:\altera\temp\pncodesearch_4\simulation\modelsim\in.txt";
VARIABLE l: LINE;
VARIABLE r :std_logic_vector(7 downto 0);
-- variable good_number : boolean;
BEGIN
while not endfile(inputfile)loop
wait until clk'event and clk='1';
readline(inputfile,l);
read(l,r);
d<=r;
end loop;
-- code executes for every event on sensitivity list
--WAIT;
END PROCESS;
--output : PROCESS
-- FILE RESULT_file: TEXT open write_mode is "out.txt";
-- VARIABLE l: LINE;
-- VARIABLE r :std_logic_vector(7 downto 0);
--begin
-- WAIT UNTIL ready='1';
--END PROCESS output;
END pncodesearch_arch;
|
楼主
标题置顶
标题高亮
