我是Unitop猎头公司的aleen，很高兴加入论坛。现在正在为上海一家美资500强企业寻找ASIC verification 工程师，机会非常好，有意向的工程师，请加我msn Aleen.1@hotmail.com
In a team environment, learn the design and verification environment of multiple ASIC/FPGA chips
Provide failure analysis support in response to field and manufacturing failures
Utilize existing test suites to drive debug efforts
Create new verification tests as necessary to augment existing verification test suites in response to failures observed
Work directly with field support, manufacturing personnel, and design engineers around the globe
Communicate status and root-cause to the technical team lead
Skills
Working knowledge of either the Verilog HDL or VHDL languages.
Demonstrated knowledge of C/C++
Familiar with the Cadence NC-Verilog simulator and a graphical waveform viewer.
Excellent communication, technical skills
Strong sense of urgency and teamwork
Ability to work well both alone or in a small cross-functional team
Education Required: Bachelor of Science in Electrical or Computer Engineering
Experience Required: 3 years of semi-custom or FPGA chip design and/or chip verification experience
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