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IBM ASIC back-end design engineer recruit<br /> Job Scopes & Responsibilities:<br />IBM ASIC/back-end design engineer is resposible for physical implementation of<br /> very large scale CMOS SoC/ASIC design from netlist handover to GDS tapeout, b<br />ased on IBM 90nm, 65nm, 45nm and beyond technology with IBM/industry leading E<br />DA tools. The work scope includes one or more of following areas:<br />- Supporting customer on IBM IP core usage, IO selection and netlist preparati<br />on/synthesis.<br />- Working with customer to define physical implementation strategies including<br /> logic partition, design planning, etc.<br />- Top level insertion and netlist processing, including IO<br />assignment/insertion, JTAG structure building, scan chain & BIST insertion, et<br />c.<br />- DFT verification and formal verification<br />- Timing assertions/constraints specification and verification, STA analysis a<br />nd design timing closure;<br />- Physical design, floorplanning, I/O planning, physical synthesis, clock tree<br /> generation and tuning, place &route;<br />- Physical verification and reliability verification;<br />- ASIC package design, image(power bus) creating and verification<br />- On chip and package power bus analysis, chip and system cominbational SI/PI <br />analysis.<br />- Design signoff<br />- Coordinating with other IBM function teams to support the related problem so<br />lving during SoC/ASIC design execution.<br />The candidate would also have future extended responsibility participating in <br />the design planning and sizing for the advanced ASIC/SoC chips, and developmen<br />t, deployment and other application engineering support of the design methodol<br />ogy.<br />If you have interest please mail to yinwen372@163.com with subject "Apply IBM <br />ASIC design engineer_yourname" and resume.<br />Thanks!<br /> |
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