IBM ASIC back-end design engineer recruit
Job Scopes & Responsibilities:
IBM ASIC/back-end design engineer is resposible for physical implementation of
very large scale CMOS SoC/ASIC design from netlist handover to GDS tapeout, b
ased on IBM 90nm, 65nm, 45nm and beyond technology with IBM/industry leading E
DA tools. The work scope includes one or more of following areas:
- Supporting customer on IBM IP core usage, IO selection and netlist preparati
on/synthesis.
- Working with customer to define physical implementation strategies including
logic partition, design planning, etc.
- Top level insertion and netlist processing, including IO
assignment/insertion, JTAG structure building, scan chain & BIST insertion, et
c.
- DFT verification and formal verification
- Timing assertions/constraints specification and verification, STA analysis a
nd design timing closure;
- Physical design, floorplanning, I/O planning, physical synthesis, clock tree
generation and tuning, place &route;
- Physical verification and reliability verification;
- ASIC package design, image(power bus) creating and verification
- On chip and package power bus analysis, chip and system cominbational SI/PI
analysis.
- Design signoff
- Coordinating with other IBM function teams to support the related problem so
lving during SoC/ASIC design execution.
The candidate would also have future extended responsibility participating in
the design planning and sizing for the advanced ASIC/SoC chips, and developmen
t, deployment and other application engineering support of the design methodol
ogy.
If you have interest please mail to yinwen372@163.com with subject "Apply IBM
ASIC design engineer_yourname" and resume.
Thanks!
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