I2caRegs.I2CPSC.all = 6; // Prescaler - need 7-12 Mhz on module clk
I2caRegs.I2CCLKL = 55; // NOTE: must be non zero
I2caRegs.I2CCLKH = 35; // NOTE: must be non zero
I2caRegs.I2CMDR.all = 0x0020; // Take I2C out of reset
// Stop I2C when suspended
I2caRegs.I2CFFTX.all = 0x6000; // Enable FIFO mode and TXFIFO
I2caRegs.I2CFFRX.all = 0x2040; // Enable RXFIFO, clear RXFFINT,
return;
}
void LMP91000_Write(Uint16 address,Uint16 data)
{
TXByteCtr=2; //发送多少位
// Wait until the STP bit is cleared from any previous master communication.
// Clearing of this bit by the module is delayed until after the SCD bit is
// set. If this bit is not checked prior to initiating a new message, the
// I2C could get confused.
while (I2caRegs.I2CMDR.bit.STP == 1)
I2caRegs.I2CSAR = 0x0048;
while (I2caRegs.I2CSTR.bit.BB == 1);
I2caRegs.I2CCNT=TXByteCtr;
I2CBufferArray[1] = address; //先存储发送LMP91000需要写数据的寄存器地址到中间数组
I2CBufferArray[0] = data; //再存储发送LMP91000需要到寄存器地址的数据到中间数组
I2caRegs.I2CDXR = I2CBufferArray[1];
I2caRegs.I2CDXR = I2CBufferArray[0];
I2caRegs.I2CMDR.all = 0x6e20; //使能I2C,主模式写,7位地址,internal data counter of the I2C module counts down to 0产生STOP
return;
}
Uint16 LMP91000_Read(Uint16 address)
{
// Wait until the STP bit is cleared from any previous master communication.
// Clearing of this bit by the module is delayed until after the SCD bit is
// set. If this bit is not checked prior to initiating a new message, the
// I2C could get confused.
while (I2caRegs.I2CMDR.bit.STP == 1);
I2caRegs.I2CSAR = 0x0048;
I2caRegs.I2CCNT = 1;
I2caRegs.I2CDXR = address;
I2caRegs.I2CMDR.all = 0x6e20; //发送start位,主模式写,internal data counter of the I2C module counts down to 0产生STOP
while (I2caRegs.I2CSTR.bit.BB == 1); //总线是否忙
I2caRegs.I2CSAR = 0x0048;
I2caRegs.I2CCNT = 1;
I2caRegs.I2CMDR.all = 0x6c20; //发送start位,主模式读,不产生stop
if(I2caRegs.I2CSTR.bit.NACKSNT == 1) //如果I2C模块是否发送发送NACK
{
I2caRegs.I2CMDR.bit.STP =1; //stop位置1
I2caRegs.I2CSTR.bit.NACKSNT=1;清除NACK标志位
I2CBuffer = I2caRegs.I2CDRR;
}
return I2CBuffer; //返回接收到的值
}