我用的AT91sam9260 EK开发板
我想用 EBI-4 (ncs4) 外扩一片静态RAM 读写都由 NCS控制，
存在问题： 测量 NCS4 始终保持高电平 无效， NCS1（连接的SDRAM） 始终是低电平 有效
程序：如下
// /******************************************** SMC CONTROLLER REGISTER defines ***************************************/
#define BSP_REG_SMC_BASE_ADDR (CPU_INT32U)(0xFFFFEC00)
#define BSP_REG_SMC_SETUP( ncs ) (*(CPU_REG32 *)( BSP_REG_SMC_BASE_ADDR + ncs*0x10 + 0x0 ) )
#define BSP_REG_SMC_PULSE( ncs ) (*(CPU_REG32 *)( BSP_REG_SMC_BASE_ADDR + ncs*0x10 + 0x4 ) )
#define BSP_REG_SMC_CYCLE( ncs ) (*(CPU_REG32 *)( BSP_REG_SMC_BASE_ADDR + ncs*0x10 + 0x8 ) )
#define BSP_REG_SMC_MODE( ncs ) (*(CPU_REG32 *)( BSP_REG_SMC_BASE_ADDR + ncs*0x10 + 0xC ) )
/* -- SMC CONTROLLER REGISTER BIT DEFINES --- */
// -------- SMC_SETUP : (SMC Offset: 0x0) Setup Register for CS x --------
#define BSP_SMC_NWESETUP( val ) ( (unsigned int) (val & 0x3F) << 0) // (SMC) NWE Setup Length
#define BSP_SMC_NCSSETUPWR( val ) ( (unsigned int) (val & 0x3F) << 8) // ((unsigned int) 0x3F << 8) // (SMC) NCS Setup Length in WRite Access
#define BSP_SMC_NRDSETUP( val ) ( (unsigned int) (val & 0x3F) << 16) // (SMC) NRD Setup Length
#define BSP_SMC_NCSSETUPRD( val ) ( (unsigned int) (val & 0x3F) << 24) // (SMC) NCS Setup Length in ReaD Access
// -------- SMC_PULSE : (SMC Offset: 0x4) Pulse Register for CS x --------
#define BSP_SMC_NWEPULSE( val ) ( (unsigned int) (val & 0x7F) << 0) // (SMC) NWE Pulse Length
#define BSP_SMC_NCSPULSEWR( val ) ( (unsigned int) (val & 0x7F) << 8) // (SMC) NCS Pulse Length in WRite Access
#define BSP_SMC_NRDPULSE( val ) ( (unsigned int) (val & 0x7F) << 16) // (SMC) NRD Pulse Length
#define BSP_SMC_NCSPULSERD( val ) ( (unsigned int) (val & 0x7F) << 24) // (SMC) NCS Pulse Length in ReaD Access
// -------- SMC_CYC : (SMC Offset: 0x8) Cycle Register for CS x --------
#define BSP_SMC_NWECYCLE( val ) ( (unsigned int) (val & 0x1FF) << 0) // (SMC) Total Write Cycle Length
#define BSP_SMC_NRDCYCLE( val ) ( (unsigned int) (val & 0x1FF) << 16) // (SMC) Total Read Cycle Length
// -------- SMC_CTRL : (SMC Offset: 0xc) Control Register for CS x --------
#define BSP_SMC_READMODE( val ) ( (unsigned int) (val & 0x1) << 0) // (SMC) Read Mode
#define BSP_SMC_WRITEMODE( val ) ( (unsigned int) (val & 0x1) << 1) // (SMC) Write Mode
#define MODE_NCS ( 0X0 ) // 读写 由 NCS 控制
#define MODE_RW ( 0X01 ) // 读写由 RD，WR 控制
#define BSP_SMC_NWAITM( val ) ( (unsigned int) (val & 0x3) << 5) // (SMC) NWAIT Mode
#define NWAIT_DISABLE ( 0x0 ) // (SMC) External NWAIT disabled. ÎÞЧģʽ
#define NWAIT_ENABLE_FROZEN ( 0x2 ) // (SMC) External NWAIT enabled in frozen mode. ¶³½áģʽ
#define NWAIT_ENABLE_READY ( 0x3 ) // (SMC) External NWAIT enabled in ready mode. ¾ÍÐ÷ģʽ
#define BSP_SMC_BAT( val ) ((unsigned int) (val & 0x1) << 8) // (SMC) Byte Access Type
#define BAT_BYTE_SELECT ( 0x0 ) // (SMC) Write controled by ncs, nbs0, nbs1, nbs2, nbs3. Read controled by ncs, nrd, nbs0, nbs1, nbs2, nbs3.
#define BAT_BYTE_WRITE ( 0x1 ) // (SMC) Write controled by ncs, nwe0, nwe1, nwe2, nwe3. Read controled by ncs and nrd.
#define BSP_SMC_DBW( val ) ((unsigned int) (val & 0x3) << 12) // (SMC) Data Bus Width
#define DBW_8_BITS ( 0x0 ) // (SMC) 8 bits.
#define DBW_16_BITS ( 0x1 ) // (SMC) 16 bits.
#define DBW_32_BITS ( 0x2 ) // (SMC) 32 bits.
#define BSP_SMC_TDF( val ) ((unsigned int) (val & 0xF) << 16) // (SMC) Data Float Time.
#define BSP_SMC_TDFEN( val ) ((unsigned int) (val & 0x1) << 20) // (SMC) TDF Enabled.
#define BSP_SMC_PMEN( val ) ((unsigned int) (val & 0x1) << 24) // (SMC) Page Mode Enabled.
#define BSP_SMC_PS( val ) ((unsigned int) (val & 0x3) << 28) // (SMC) Page Size
#define PS_SIZE_4_BYTES ( 0x0 ) // (SMC) 4 bytes.
#define PS_SIZE_8_BYTES ( 0x1 ) // (SMC) 8 bytes.
#define PS_SIZE_16_BYTES ( 0x2 ) // (SMC) 16 bytes.
#define PS_SIZE_32_BYTES ( 0x3 ) // (SMC) 32 bytes.
static void BSP_SMC_Init(unsigned char ncs )
{
BSP_REG_SMC_SETUP( ncs ) = BSP_SMC_NWESETUP( 2 ) | BSP_SMC_NCSSETUPWR( 2 ) | BSP_SMC_NRDSETUP( 2 ) | BSP_SMC_NCSSETUPRD( 2 ) ;
BSP_REG_SMC_PULSE( ncs ) = BSP_SMC_NWEPULSE( 6 ) | BSP_SMC_NCSPULSEWR( 6 ) | BSP_SMC_NRDPULSE( 6 ) | BSP_SMC_NCSPULSERD( 6 ) ;
BSP_REG_SMC_CYCLE( ncs ) = BSP_SMC_NWECYCLE( 20 ) | BSP_SMC_NRDCYCLE( 20 );
BSP_REG_SMC_MODE( ncs ) = BSP_SMC_READMODE( MODE_NCS ) | BSP_SMC_WRITEMODE( MODE_NCS ) |
BSP_SMC_NWAITM( NWAIT_DISABLE ) |
BSP_SMC_BAT( BAT_BYTE_WRITE ) |
BSP_SMC_DBW( DBW_8_BITS ) |
BSP_SMC_TDF( 0 ) |
BSP_SMC_TDFEN( 0 ) |
BSP_SMC_PMEN( 0 ) |
BSP_SMC_PS( 0 );
BSP_GPIO_Cfg(BSP_GPIO_PORT_C,
(1<<8),
BSP_GPIO_OPT_PER_SEL_A);
BSP_PerClkEn(BSP_PER_ID_PIOC);
BSP_PerClkEn(BSP_PER_ID_SYSC);
// DEF_BIT_SET(BSP_REG_CCFG_EBICSA, 0x00010002);
BSP_REG_CCFG_EBICSA = 0x00010002;
}
现在是执行 写操作：
CPU_INT32U *Sram_address;
CPU_INT32U counter = 10 ;
Sram_address = (CPU_INT32U*)0x50000010;
*Sram_address = counter;
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