我是新手，大侠帮忙看看always那堆代码是做什么功能的？感激不尽
module dpram_1024(
clk_160mhz,
data_a,
wr_a,
rd_a,
address_a,
data_b,
address_b,
wr_b,
rd_b,
);
input clk_160mhz;
inout [31:0] data_a;
input wr_a,rd_a;
input [9:0] address_a;
inout [31:0] data_b;
input [9:0] address_b;
input wr_b,rd_b;
wire [31:0]q_a,q_b;
wire read_a,read_b;
lcell(.in(rd_a),.out(read_a));
lcell(.in(rd_b),.out(read_b));
bufif1 d0(data_a[0],q_a[0],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d1(data_a[1],q_a[1],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d2(data_a[2],q_a[2],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d3(data_a[3],q_a[3],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d4(data_a[4],q_a[4],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d5(data_a[5],q_a[5],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d6(data_a[6],q_a[6],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d7(data_a[7],q_a[7],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d8(data_a[8],q_a[8],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d9(data_a[9],q_a[9],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d10(data_a[10],q_a[10],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d11(data_a[11],q_a[11],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d12(data_a[12],q_a[12],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d13(data_a[13],q_a[13],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d14(data_a[14],q_a[14],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d15(data_a[15],q_a[15],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d16(data_a[16],q_a[16],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d17(data_a[17],q_a[17],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d18(data_a[18],q_a[18],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d19(data_a[19],q_a[19],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d20(data_a[20],q_a[20],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d21(data_a[21],q_a[21],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d22(data_a[22],q_a[22],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d23(data_a[23],q_a[23],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d24(data_a[24],q_a[24],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d25(data_a[25],q_a[25],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d26(data_a[26],q_a[26],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d27(data_a[27],q_a[27],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d28(data_a[28],q_a[28],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d29(data_a[29],q_a[29],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d30(data_a[30],q_a[30],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 d31(data_a[31],q_a[31],(read_a|rd_a)&(~wr_a)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd0(data_b[0],q_b[0],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd1(data_b[1],q_b[1],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd2(data_b[2],q_b[2],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd3(data_b[3],q_b[3],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd4(data_b[4],q_b[4],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd5(data_b[5],q_b[5],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd6(data_b[6],q_b[6],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd7(data_b[7],q_b[7],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd8(data_b[8],q_b[8],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd9(data_b[9],q_b[9],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd10(data_b[10],q_b[10],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd11(data_b[11],q_b[11],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd12(data_b[12],q_b[12],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd13(data_b[13],q_b[13],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd14(data_b[14],q_b[14],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd15(data_b[15],q_b[15],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd16(data_b[16],q_b[16],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd17(data_b[17],q_b[17],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd18(data_b[18],q_b[18],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd19(data_b[19],q_b[19],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd20(data_b[20],q_b[20],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd21(data_b[21],q_b[21],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd22(data_b[22],q_b[22],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd23(data_b[23],q_b[23],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd24(data_b[24],q_b[24],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd25(data_b[25],q_b[25],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd26(data_b[26],q_b[26],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd27(data_b[27],q_b[27],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd28(data_b[28],q_b[28],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd29(data_b[29],q_b[29],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd30(data_b[30],q_b[30],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
bufif1 dd31(data_b[31],q_b[31],(read_b|rd_b)&(~wr_b)); //¨¨y¨??¨o?3??ê?rd_en?a¨¨y¨??¨o1?¨1D?o?
reg wren_a,wren_b;
reg wr_reg1_a,wr_reg1_b,wr_reg2_a,wr_reg2_b;
always@(posedge clk_160mhz)
begin
wr_reg1_a<=wr_a;
wr_reg1_b<=wr_b;
wr_reg2_a<=wr_reg1_a;
wr_reg2_b<=wr_reg1_b;
if((~wr_reg1_a)&wr_a)
wren_a<=1;
else
begin
if((~wr_reg2_a)&wr_reg1_a)
wren_a<=1;
else
wren_a<=0;
end
if((~wr_reg1_b)&wr_b)
wren_b<=1;
else
begin
if((~wr_reg2_b)&wr_reg1_b)
wren_b<=1;
else
wren_b<=0;
end
end
altsyncram altsyncram_component (
.wren_a (wren_a),
.clock0 (clk_160mhz),
.wren_b (wren_b),
.clock1 (clk_160mhz),
.address_a (address_a),
.address_b (address_b),
.data_a (data_a),
.data_b (data_b),
.q_a (q_a),
.q_b (q_b),
.aclr0 (1'b0),
.aclr1 (1'b0),
.byteena_a (1'b1),
.byteena_b (1'b1),
.rden_b (1'b1),
.clocken0 (1'b1),
.clocken1 (1'b1),
.addressstall_a (1'b0),
.addressstall_b (1'b0));
defparam
altsyncram_component.operation_mode = "BIDIR_DUAL_PORT",
altsyncram_component.width_a = 32,
altsyncram_component.widthad_a = 10,
altsyncram_component.numwords_a = 1024,
altsyncram_component.width_b = 32,
altsyncram_component.widthad_b = 10,
altsyncram_component.numwords_b = 1024,
altsyncram_component.lpm_type = "altsyncram",
altsyncram_component.width_byteena_a = 1,
altsyncram_component.width_byteena_b = 1,
altsyncram_component.outdata_reg_a = "UNREGISTERED",
altsyncram_component.outdata_aclr_a = "NONE",
altsyncram_component.outdata_reg_b = "UNREGISTERED",
altsyncram_component.indata_aclr_a = "NONE",
altsyncram_component.wrcontrol_aclr_a = "NONE",
altsyncram_component.address_aclr_a = "NONE",
altsyncram_component.indata_reg_b = "CLOCK1",
altsyncram_component.address_reg_b = "CLOCK1",
altsyncram_component.wrcontrol_wraddress_reg_b = "CLOCK1",
altsyncram_component.indata_aclr_b = "NONE",
altsyncram_component.wrcontrol_aclr_b = "NONE",
altsyncram_component.address_aclr_b = "NONE",
altsyncram_component.outdata_aclr_b = "NONE",
altsyncram_component.intended_device_family = "Cyclone";
endmodule
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