MSP430f6xx单片机晶振不起振

只看该作者 · 2014-10-16 18:19

本帖最后由 zilong1013 于 2014-10-16 18:20 编辑

各位大神帮帮忙啊！我用MSP430f6xx单片机，XT1晶振不起振。
void Init_Clk()
{ unsigned int i;
  P7SEL |=0x0f;
UCSCTL6 &= ~XT1OFF;// enalbe XT1
UCSCTL6 |= XT1DRIVE_0 + XCAP_3;
  while(SFRIFG1&OFIFG)

  {
   UCSCTL7 &= ~(DCOFFG+XT1LFOFFG+XT1HFOFFG+XT2OFFG);
   SFRIFG1 &= ~OFIFG;          // Clear fault flags
   for (i = 0xFF; i > 0; i--); // 延时，等待XT1起振
  }
}

3万 · 2014-10-16 22:02

检查电路，如果电路没问题，建议增加谐振电容试试

只看该作者 · 2014-10-17 10:59

dirtwillfly 发表于 2014-10-16 22:02
检查电路，如果电路没问题，建议增加谐振电容试试

20P，22P，30P，33P都用了，不行啊，而且XT1LFOFFG标志时钟为1，清除都不管用

只看该作者 · 2014-10-17 15:03

本帖最后由 yirongfu 于 2014-10-17 15:04 编辑

复制

TI的示例代码供排除硬件问题的参考。

/* --COPYRIGHT--,BSD_EX
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*******************************************************************************
*
*                      MSP430 CODE EXAMPLE DISCLAIMER
*
* MSP430 code examples are self-contained low-level programs that typically
* demonstrate a single peripheral function or device feature in a highly
* concise manner. For this the code may rely on the device's power-on default
* register values and settings such as the clock configuration and care must
* be taken when combining code from several examples to avoid potential side
* effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
* for an API functional library-approach to peripheral configuration.
*
* --/COPYRIGHT--*/
//******************************************************************************
//  MSP430F66x Demo - XT1 sources ACLK
//
//  Description: This program demonstrates using XT1 to source ACLK
//  ACLK = LFXT1 = 32,768Hz
//  //* An external watch crystal between XIN & XOUT is required for ACLK *//
//
//             MSP430F66x
//          -----------------
//       /|\ |             XIN|-
//       |  |                | 32kHz
//       ---|RST       XOUT|-
//          |                |
//          |          P1.0|-->ACLK = ~32kHz
//          |                |
//
// Priya Thanigai
// Texas Instruments Inc.
// Nov 2009
// Built with IAR Embedded Workbench Version: 4.20 & Code Composer Studio V4.0
//******************************************************************************
#include <msp430.h>

int main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                // Stop watchdog timer

  P1DIR |= BIT0;                         // ACLK set out to pin
  P1SEL |= BIT0;

  while(BAKCTL & LOCKBAK)                   // Unlock XT1 pins for operation
   BAKCTL &= ~(LOCKBAK);
  UCSCTL6 &= ~(XT1OFF);                   // XT1 On
  UCSCTL6 |= XCAP_3;                      // Internal load cap
  // Loop until XT1 fault flag is cleared
  do
  {
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
                                          // Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG;                   // Clear fault flags
  }while (SFRIFG1&OFIFG);                // Test oscillator fault flag

  UCSCTL6 &= ~(XT1DRIVE_3);                // Xtal is now stable, reduce drive strength

  UCSCTL4 |= SELA_0;                      // ACLK = LFTX1 (by default)

  __bis_SR_register(LPM3_bits);          // Enter LPM3
  __no_operation();                      // For debugger
}