/*
// Set properties: RF_MODEM_CHFLT_RX2_CHFLT_COE7_7_0_12_1
// Number of properties: 12
// Group ID: 0x21
// Start ID: 0x18
// Default values: 0xB8, 0xDE, 0x05, 0x17, 0x16, 0x0C, 0x03, 0x00, 0x15, 0xFF, 0x00, 0x00,
// Descriptions:
// MODEM_CHFLT_RX2_CHFLT_COE7_7_0 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COE6_7_0 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COE5_7_0 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COE4_7_0 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COE3_7_0 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COE2_7_0 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COE1_7_0 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COE0_7_0 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COEM0 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COEM1 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COEM2 - Filter coefficients for the second set of RX filter coefficients.
// MODEM_CHFLT_RX2_CHFLT_COEM3 - Filter coefficients for the second set of RX filter coefficients.
*/
#define RF_MODEM_CHFLT_RX2_CHFLT_COE7_7_0_12_1 0x11, 0x21, 0x0C, 0x18, 0xC9, 0xFC, 0x1B, 0x1E, 0x0F, 0x01, 0xFC, 0xFD, 0x15, 0xFF, 0x00, 0x0F
/*
// Set properties: RF_PA_TC_1_1
// Number of properties: 1
// Group ID: 0x22
// Start ID: 0x03
// Default values: 0x5D,
// Descriptions:
// PA_TC - Configuration of PA ramping parameters.
*/
#define RF_PA_TC_1_1 0x11, 0x22, 0x01, 0x03, 0x3F
/*
// Set properties: RF_SYNTH_PFDCP_CPFF_7_1
// Number of properties: 7
// Group ID: 0x23
// Start ID: 0x00
// Default values: 0x2C, 0x0E, 0x0B, 0x04, 0x0C, 0x73, 0x03,
// Descriptions:
// SYNTH_PFDCP_CPFF - Feed forward charge pump current selection.
// SYNTH_PFDCP_CPINT - Integration charge pump current selection.
// SYNTH_VCO_KV - Gain scaling factors (Kv) for the VCO tuning varactors on both the integrated-path and feed forward path.
// SYNTH_LPFILT3 - Value of resistor R2 in feed-forward path of loop filter.
// SYNTH_LPFILT2 - Value of capacitor C2 in feed-forward path of loop filter.
// SYNTH_LPFILT1 - Value of capacitors C1 and C3 in feed-forward path of loop filter.
// SYNTH_LPFILT0 - Bias current of the active amplifier in the feed-forward loop filter.
*/
#define RF_SYNTH_PFDCP_CPFF_7_1 0x11, 0x23, 0x07, 0x00, 0x2C, 0x0E, 0x0B, 0x04, 0x0C, 0x73, 0x03
/*
// Set properties: RF_MATCH_VALUE_1_12
// Number of properties: 12
// Group ID: 0x30
// Start ID: 0x00
// Default values: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
// Descriptions:
// MATCH_VALUE_1 - Match value to be compared with the result of logically AND-ing (bit-wise) the Mask 1 value with the received Match 1 byte.
// MATCH_MASK_1 - Mask value to be logically AND-ed (bit-wise) with the Match 1 byte.
// MATCH_CTRL_1 - Enable for Packet Match functionality, and configuration of Match Byte 1.
// MATCH_VALUE_2 - Match value to be compared with the result of logically AND-ing (bit-wise) the Mask 2 value with the received Match 2 byte.
// MATCH_MASK_2 - Mask value to be logically AND-ed (bit-wise) with the Match 2 byte.
// MATCH_CTRL_2 - Configuration of Match Byte 2.
// MATCH_VALUE_3 - Match value to be compared with the result of logically AND-ing (bit-wise) the Mask 3 value with the received Match 3 byte.
// MATCH_MASK_3 - Mask value to be logically AND-ed (bit-wise) with the Match 3 byte.
// MATCH_CTRL_3 - Configuration of Match Byte 3.
// MATCH_VALUE_4 - Match value to be compared with the result of logically AND-ing (bit-wise) the Mask 4 value with the received Match 4 byte.
// MATCH_MASK_4 - Mask value to be logically AND-ed (bit-wise) with the Match 4 byte.
// MATCH_CTRL_4 - Configuration of Match Byte 4.
*/
#define RF_MATCH_VALUE_1_12 0x11, 0x30, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
/*
// Set properties: RF_FREQ_CONTROL_INTE_8_1
// Number of properties: 8
// Group ID: 0x40
// Start ID: 0x00
// Default values: 0x3C, 0x08, 0x00, 0x00, 0x00, 0x00, 0x20, 0xFF,
// Descriptions:
// FREQ_CONTROL_INTE - Frac-N PLL Synthesizer integer divide number.
// FREQ_CONTROL_FRAC_2 - Frac-N PLL fraction number.
// FREQ_CONTROL_FRAC_1 - Frac-N PLL fraction number.
// FREQ_CONTROL_FRAC_0 - Frac-N PLL fraction number.
// FREQ_CONTROL_CHANNEL_STEP_SIZE_1 - EZ Frequency Programming channel step size.
// FREQ_CONTROL_CHANNEL_STEP_SIZE_0 - EZ Frequency Programming channel step size.
// FREQ_CONTROL_W_SIZE - Set window gating period (in number of crystal reference clock cycles) for counting VCO frequency during calibration.
// FREQ_CONTROL_VCOCNT_RX_ADJ - Adjust target count for VCO calibration in RX mode.
*/
#define RF_FREQ_CONTROL_INTE_8_1 0x11, 0x40, 0x08, 0x00, 0x38, 0x0F, 0x25, 0x8B, 0x44, 0x44, 0x20, 0xFE
// AUTOMATICALLY GENERATED CODE!
// DO NOT EDIT/MODIFY BELOW THIS LINE!
// --------------------------------------------
#ifndef FIRMWARE_LOAD_COMPILE
#define RADIO_CONFIGURATION_DATA_ARRAY { \
0x07, RF_POWER_UP, \
0x08, RF_GPIO_PIN_CFG, \
0x05, RF_GLOBAL_XO_TUNE_1, \
0x05, RF_GLOBAL_CONFIG_1, \
0x10, RF_MODEM_MOD_TYPE_12, \
0x05, RF_MODEM_FREQ_DEV_0_1, \
0x0C, RF_MODEM_TX_RAMP_DELAY_8, \
0x0D, RF_MODEM_BCR_OSR_1_9, \
0x0B, RF_MODEM_AFC_GEAR_7, \
0x05, RF_MODEM_AGC_CONTROL_1, \
0x07, RF_MODEM_AGC_WINDOW_SIZE_3, \
0x05, RF_MODEM_OOK_PDTC_1, \
0x0C, RF_MODEM_OOK_CNT1_8, \
0x05, RF_MODEM_RSSI_COMP_1, \
0x05, RF_MODEM_CLKGEN_BAND_1, \
0x10, RF_MODEM_CHFLT_RX1_CHFLT_COE13_7_0_12, \
0x10, RF_MODEM_CHFLT_RX1_CHFLT_COE1_7_0_12, \
0x10, RF_MODEM_CHFLT_RX2_CHFLT_COE7_7_0_12, \
0x05, RF_PA_TC_1, \
0x0B, RF_SYNTH_PFDCP_CPFF_7, \
0x0C, RF_FREQ_CONTROL_INTE_8, \
0x08, RF_START_RX, \
0x05, RF_GLOBAL_CLK_CFG_1, \
0x05, RF_GLOBAL_CONFIG_1_1, \
0x08, RF_INT_CTL_ENABLE_4, \
0x08, RF_FRR_CTL_A_MODE_4, \
0x0D, RF_PREAMBLE_TX_LENGTH_9, \
0x09, RF_SYNC_CONFIG_5, \
0x05, RF_PKT_CRC_CONFIG_1, \
0x08, RF_PKT_WHT_SEED_15_8_4, \
0x10, RF_PKT_LEN_12, \
0x10, RF_PKT_FIELD_2_CRC_CONFIG_12, \
0x10, RF_PKT_FIELD_5_CRC_CONFIG_12, \
0x0D, RF_PKT_RX_FIELD_3_CRC_CONFIG_9, \
0x10, RF_MODEM_MOD_TYPE_12_1, \
0x05, RF_MODEM_FREQ_DEV_0_1_1, \
0x0C, RF_MODEM_TX_RAMP_DELAY_8_1, \
0x0D, RF_MODEM_BCR_OSR_1_9_1, \
0x0B, RF_MODEM_AFC_GEAR_7_1, \
0x05, RF_MODEM_AGC_CONTROL_1_1, \
0x07, RF_MODEM_AGC_WINDOW_SIZE_3_1, \
0x05, RF_MODEM_OOK_PDTC_1_1, \
0x0D, RF_MODEM_OOK_CNT1_9, \
0x05, RF_MODEM_RSSI_CONTROL_1, \
0x05, RF_MODEM_RSSI_COMP_1_1, \
0x05, RF_MODEM_CLKGEN_BAND_1_1, \
0x10, RF_MODEM_CHFLT_RX1_CHFLT_COE13_7_0_12_1, \
0x10, RF_MODEM_CHFLT_RX1_CHFLT_COE1_7_0_12_1, \
0x10, RF_MODEM_CHFLT_RX2_CHFLT_COE7_7_0_12_1, \
0x05, RF_PA_TC_1_1, \
0x0B, RF_SYNTH_PFDCP_CPFF_7_1, \
0x10, RF_MATCH_VALUE_1_12, \
0x0C, RF_FREQ_CONTROL_INTE_8_1, \
0x00 \
}
#else
#define RADIO_CONFIGURATION_DATA_ARRAY { 0 }
#endif
// DEFAULT VALUES FOR CONFIGURATION PARAMETERS
#define RADIO_CONFIGURATION_DATA_RADIO_XO_FREQ_DEFAULT 30000000L
#define RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER_DEFAULT 0x00
#define RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH_DEFAULT 0x10
#define RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP_DEFAULT 0x01
#define RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET_DEFAULT 0x1000
#define RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD_DEFAULT {0x42, 0x55, 0x54, 0x54, 0x4F, 0x4E, 0x31} // BUTTON1
#define RADIO_CONFIGURATION_DATA_RADIO_PATCH_INCLUDED 0x00
#define RADIO_CONFIGURATION_DATA_RADIO_PATCH_SIZE 0x00
#define RADIO_CONFIGURATION_DATA_RADIO_PATCH { }
#ifndef RADIO_CONFIGURATION_DATA_ARRAY
#error "This property must be defined!"
#endif
#ifndef RADIO_CONFIGURATION_DATA_RADIO_XO_FREQ
#define RADIO_CONFIGURATION_DATA_RADIO_XO_FREQ RADIO_CONFIGURATION_DATA_RADIO_XO_FREQ_DEFAULT
#endif
#ifndef RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER
#define RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER_DEFAULT
#endif
#ifndef RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH
#define RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH_DEFAULT
#endif
#ifndef RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP
#define RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP_DEFAULT
#endif
#ifndef RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET
#define RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET_DEFAULT
#endif
#ifndef RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD
#define RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD_DEFAULT
#endif
#define RADIO_CONFIGURATION_DATA { \
Radio_Configuration_Data_Array, \
RADIO_CONFIGURATION_DATA_CHANNEL_NUMBER, \
RADIO_CONFIGURATION_DATA_RADIO_PACKET_LENGTH, \
RADIO_CONFIGURATION_DATA_RADIO_STATE_AFTER_POWER_UP, \
RADIO_CONFIGURATION_DATA_RADIO_DELAY_CNT_AFTER_RESET, \
RADIO_CONFIGURATION_DATA_CUSTOM_PAYLOAD \
}
#endif /* RADIO_CONFIG_H_ */
楼主
标题置顶
标题高亮
