400MHz的AT91SAM9G20

只看该作者 · 2009-1-7 21:35

图片怎么传？

只看该作者 · 2009-1-7 21:36

只看该作者 · 2009-1-7 21:39

只看该作者 · 2009-1-7 21:44

以弥补9G20没有显示的缺陷

只看该作者 · 2009-1-7 22:45

成本大概是多少？

只看该作者 · 2009-1-7 23:41

AT91SAM9G20最新版的datasheet里面提到了一个问题,就是上电和断电的次序问题,不知道楼主注意到了没有?

只看该作者 · 2009-1-7 23:44

VDDIOM and VDDIOP must NOT be powered until VDDCORE has reached a level superior
or equal to Vth+ (0.5V).
-- VDDIOM and VDDIOP must be ≥ 0.7V within (T2 + T3) after VDDCORE reaches
Vth+ (0.5V).
-- VDDIOM and VDDIOP must reach Voh (2.6V) within (T2 +T3 +T4) after VDDCORE has
reached Vth+ (0.5V).
-- T2 = Tres = 30 μs
-- T3 = 3 x Tslck
-- T4 = 14 x Tslck
Tsclk min (22 μs) is obtained for the maximum frequency of the internal RC oscillator (44 kHz).
This gives:
-- T2 = Tres = 30 μs
-- T3 = 66 μs
-- T4 = 308 μs