The first 6 bits (A5 ~ A0) specify the address of the register. And next bit<br />mean Read/Write command. “0” is write. “1” is read. And next cycle is turn-round<br />cycle. And the last 8 bits are for Data setting (D7 ~ D0). The address and data are<br />transferred from the MSB to LSB sequentially.<br />The data is written to the register of assigned address when “End of transfer”<br />is detected after the 16th SCL rising cycles. Data is not accepted if there are less<br />or more than 16 cycles for one transaction.<br /><br /><br /><br />我用普通的IO口模拟这个时序,第8位时该如何处理 ?<br /><br /> |
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