The first 6 bits (A5 ~ A0) specify the address of the register. And next bit
mean Read/Write command. “0” is write. “1” is read. And next cycle is turn-round
cycle. And the last 8 bits are for Data setting (D7 ~ D0). The address and data are
transferred from the MSB to LSB sequentially.
The data is written to the register of assigned address when “End of transfer”
is detected after the 16th SCL rising cycles. Data is not accepted if there are less
or more than 16 cycles for one transaction.
我用普通的IO口模拟这个时序,第8位时该如何处理 ?
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