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8位比较器，大于DCH时，输出＝1，否则＝0，VHDL程序如下：<br />LIBRARY IEEE ;<br />USE IEEE.STD_LOGIC_1164.ALL ;<br />ENTITY comparator_bc IS -- 表示8位数值比较器>=DCH,<br />PORT ( dataA : IN STD_LOGIC_VECTOR ( 7 DOWNTO 0 ) ;<br /> rfmute : IN STD_LOGIC;<br /> greater_bc : OUT STD_LOGIC ; -- A大于DCH输出信号<br />END ENTITY comparator_bc ;<br /><br />ARCHITECTURE behavioral OF comparator_bc IS<br />SIGNAL dataB : IN STD_LOGIC_VECTOR ( 7 DOWNTO 0 ) ;<br /><br />BEGIN<br />inst_comparator : PROCESS ( rfmute,dataA, dataB )<br />BEGIN<br /> dataB <= "11011100"; --dataB=DCH<br /> IF ( rfmute='1' ) THEN<br /> FOR i IN 7 DOWNTO 0 LOOP<br /> IF ( dataA ( i ) = '1' AND dataB ( i ) = '0' ) THEN<br /> greater_bc <= '1' ;<br /> EXIT ; -- 已经判断出dataA> dataB,则跳出循环<br /> <br /> ELSE<br /> greater_bc <= '0' ;<br /> END LOOP; <br /> ELSE<br /> greater_bc <= '0' ;<br /> END IF ;<br />END PROCESS inst_comparator ;<br />END ARCHITECTURE behavioral ;<br /><br /><br />编译总是报错<br />Error (10500): VHDL syntax error at comparator_bc.vhd(7) near text "END"; expecting an identifier ("end" is a reserved keyword), or "constant", or "file", or "signal", or "variable"<br />Error (10500): VHDL syntax error at comparator_bc.vhd(12) near text "BEGIN"; expecting an identifier ("begin" is a reserved keyword), or "constant", or "file", or "signal", or "variable"<br />Error (10500): VHDL syntax error at comparator_bc.vhd(13) near text ")"; expecting ":", or ","<br /><br />请高手指点。谢谢<br /> |
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