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FPGA控制双口RAM cy7c025,写数据0x5555,单片机读数据不是0x5555.<br />请熟悉的兄弟看看，我的程序可有错误？<br /><br /><br />RAM_WRITE:process(RAM_CURRENT_STATE,address_cnt) --DRAM写入控制状态机时序进程<br />begin<br /> case RAM_CURRENT_STATE is <br /> when START_WRITE => --DRAM初始化<br /> ram_cs <= '1';<br /> ram_wr <= '1';<br /> ram_rd <= '1';<br /> address_plus <= '0';<br /> RAM_NEXT_STATE <= WRITE1;<br /> <br /> when WRITE1 => <br /> ram_cs <= '0';<br /> ram_wr <= '1';<br /> codeaddress <= address_cnt;<br /> RAM_NEXT_STATE <= WRITE2;<br /> <br /> when WRITE2 => --ad1数据写向DRAN<br /> ram_cs <= '0';<br /> ram_wr <= '0';<br /> ram_data <= X"5555"; --addata1;<br /> ram_rd <= '1';<br /> <br /> RAM_NEXT_STATE <= WRITE3;<br /><br /> when WRITE3 => <br /> ram_cs <= '0';<br /> ram_wr <= '1';<br /> ram_rd <= '1';<br /> address_plus <= '1';<br /> RAM_NEXT_STATE <= WRITE_END;<br /><br /> when WRITE_END => <br /> ram_cs <= '1';<br /> ram_wr <= '1';<br /> ram_rd <= '1';<br /> address_plus <= '0';<br /> RAM_NEXT_STATE <=START_WRITE;<br /> <br /> when others => --所有闲置状态导入初始态<br /> RAM_NEXT_STATE <=START_WRITE;<br /> end case;<br />end process;<br /><br /><br /><br /> |
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