/**************************************************************************//** * [url=home.php?mod=space&uid=288409]@file[/url] main.c * [url=home.php?mod=space&uid=895143]@version[/url] V3.00 * $Revision: 3 $ * $Date: 14/04/03 9:18a $ * [url=home.php?mod=space&uid=247401]@brief[/url] M051 Series GPIO Driver Sample Code * * @note * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved. ******************************************************************************/ #include <stdio.h> #include "M051Series.h" #define PLLCON_SETTING CLK_PLLCON_50MHz_HXT #define PLL_CLOCK 50000000 /** * @brief Port0/Port1 IRQ * * @param None * * [url=home.php?mod=space&uid=266161]@return[/url] None * * [url=home.php?mod=space&uid=1543424]@Details[/url] The Port0/Port1 default IRQ, declared in startup_M051Series.s. */ void GPIOP0P1_IRQHandler(void) { /* To check if P1.3 interrupt occurred */ if(P1->ISRC & BIT3) { P1->ISRC = BIT3; printf("P1.3 INT occurred.\n"); } else { /* Un-expected interrupt. Just clear all PORT0, PORT1 interrupts */ P0->ISRC = P0->ISRC; P1->ISRC = P1->ISRC; printf("Un-expected interrupts.\n"); } } /** * @brief Port2/Port3/Port4 IRQ * * @param None * * @return None * * @details The Port2/Port3/Port4 default IRQ, declared in startup_M051Series.s. */ void GPIOP2P3P4_IRQHandler(void) { /* To check if P4.5 interrupt occurred */ if(P4->ISRC & BIT5) { P4->ISRC = BIT5; printf("P4.5 INT occurred.\n"); } else { /* Un-expected interrupt. Just clear all PORT2, PORT3 and PORT4 interrupts */ P2->ISRC = P2->ISRC; P3->ISRC = P3->ISRC; P4->ISRC = P4->ISRC; printf("Un-expected interrupts.\n"); } } void SYS_Init(void) { /*---------------------------------------------------------------------------------------------------------*/ /* Init System Clock */ /*---------------------------------------------------------------------------------------------------------*/ /* Enable Internal RC 22.1184MHz clock */ CLK->PWRCON |= CLK_PWRCON_OSC22M_EN_Msk; /* Waiting for Internal RC clock ready */ while(!(CLK->CLKSTATUS & CLK_CLKSTATUS_OSC22M_STB_Msk)); /* Switch HCLK clock source to Internal RC and and HCLK source divide 1 */ CLK->CLKSEL0 &= ~CLK_CLKSEL0_HCLK_S_Msk; CLK->CLKSEL0 |= CLK_CLKSEL0_HCLK_S_HIRC; CLK->CLKDIV &= ~CLK_CLKDIV_HCLK_N_Msk; CLK->CLKDIV |= CLK_CLKDIV_HCLK(1); /* Enable external XTAL 12MHz clock */ CLK->PWRCON |= CLK_PWRCON_XTL12M_EN_Msk; /* Waiting for external XTAL clock ready */ while(!(CLK->CLKSTATUS & CLK_CLKSTATUS_XTL12M_STB_Msk)); /* Set core clock as PLL_CLOCK from PLL */ CLK->PLLCON = PLLCON_SETTING; while(!(CLK->CLKSTATUS & CLK_CLKSTATUS_PLL_STB_Msk)); CLK->CLKSEL0 &= (~CLK_CLKSEL0_HCLK_S_Msk); CLK->CLKSEL0 |= CLK_CLKSEL0_HCLK_S_PLL; /* Update System Core Clock */ /* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically. */ //SystemCoreClockUpdate(); PllClock = PLL_CLOCK; // PLL SystemCoreClock = PLL_CLOCK / 1; // HCLK CyclesPerUs = PLL_CLOCK / 1000000; // For SYS_SysTickDelay() /* Enable UART module clock */ CLK->APBCLK |= CLK_APBCLK_UART0_EN_Msk; /* Select UART module clock source */ CLK->CLKSEL1 &= ~CLK_CLKSEL1_UART_S_Msk; CLK->CLKSEL1 |= CLK_CLKSEL1_UART_S_PLL; /*---------------------------------------------------------------------------------------------------------*/ /* Init I/O Multi-function */ /*---------------------------------------------------------------------------------------------------------*/ /* Set P3 multi-function pins for UART0 RXD and TXD */ SYS->P3_MFP &= ~(SYS_MFP_P30_Msk | SYS_MFP_P31_Msk); SYS->P3_MFP |= (SYS_MFP_P30_RXD0 | SYS_MFP_P31_TXD0); } void UART0_Init() { /*---------------------------------------------------------------------------------------------------------*/ /* Init UART */ /*---------------------------------------------------------------------------------------------------------*/ /* Reset UART IP */ SYS->IPRSTC2 |= SYS_IPRSTC2_UART0_RST_Msk; SYS->IPRSTC2 &= ~SYS_IPRSTC2_UART0_RST_Msk; /* Configure UART0 and set UART0 Baudrate */ UART0->BAUD = UART_BAUD_MODE2 | UART_BAUD_MODE2_DIVIDER(PLL_CLOCK, 115200); UART0->LCR = UART_WORD_LEN_8 | UART_PARITY_NONE | UART_STOP_BIT_1; } /*---------------------------------------------------------------------------------------------------------*/ /* MAIN function */ /*---------------------------------------------------------------------------------------------------------*/ int main(void) { /* Unlock protected registers */ SYS->REGWRPROT = 0x59; SYS->REGWRPROT = 0x16; SYS->REGWRPROT = 0x88; /* Init System, peripheral clock and multi-function I/O */ SYS_Init(); /* Lock protected registers */ SYS->REGWRPROT = 0x0; /* Init UART0 for printf */ UART0_Init(); printf("\n\nCPU [url=home.php?mod=space&uid=72445]@[/url] %d Hz\n", SystemCoreClock); printf("+------------------------------------------------+\n"); printf("| GPIO P1.3 and P4.5 Interrupt Sample Code |\n"); printf("+------------------------------------------------+\n\n"); /*-----------------------------------------------------------------------------------------------------*/ /* GPIO Interrupt Function Test */ /*-----------------------------------------------------------------------------------------------------*/ printf("P1.3 and P4.5 are used to test interrupt ......\n"); /* Configure P1.3 as Input mode and enable interrupt by rising edge trigger */ P1->PMD = P1->PMD & (~GPIO_PMD_PMD3_Msk) | (GPIO_PMD_INPUT << GPIO_PMD_PMD3_Pos); P1->IMD |= (GPIO_IMD_EDGE << 3); P1->IEN |= (BIT3 << GPIO_IEN_IR_EN_Pos); NVIC_EnableIRQ(GPIO_P0P1_IRQn); /* Configure P4.5 as Quasi-bidirection mode and enable interrupt by falling edge trigger */ P4->PMD = P1->PMD & (~GPIO_PMD_PMD5_Msk) | (GPIO_PMD_QUASI << GPIO_PMD_PMD5_Pos); P4->IMD |= (GPIO_IMD_EDGE << 5); P4->IEN |= (BIT5 << GPIO_IEN_IF_EN_Pos); NVIC_EnableIRQ(GPIO_P2P3P4_IRQn); /* Waiting for interrupts */ while(1); } /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/
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