好象不是这样初始化的吧。
#define P6OUT_INIT 0xff
#define P6SEL_INIT 0xff // P6-Modules:A0,A1,A2,A3,A4,A5,A6,A7 ADC option select
#define P6DIR_INIT 0 // Init of Port6 Data-Direction Reg (Out=1 / Inp=0)
ADC12CTL0 = ADC12ON | MSC | REF2_5V | REFON | SHT0_DIV8; // Turn on ADC12, RefV = 2.5V,set sampling time 8us
ADC12CTL1 = SHP | ADC12DIV_7 | ADC12SSEL_MCLK | CONSEQ_1; // Use sampling timer, single sequence
ADC12MCTL0 = SREF_VREF_AVSS | INCH_0; // VR+ = VREF+ and VR-= AVSS, channel = A0
ADC12MCTL1 = SREF_VREF_AVSS | INCH_1; // VR+ = VREF+ and VR-= AVSS, channel = A1
ADC12MCTL2 = SREF_VREF_AVSS | INCH_7; // VR+ = VREF+ and VR-= AVSS, channel = A7(BATT)
ADC12MCTL3 = SREF_VREF_AVSS | INCH_TEMP; // VR+ = VREF+ and VR-= AVSS, channel = Temperature diode
ADC12MCTL4 = SREF_VREF_AVSS | INCH_VCC2 | EOS; // VR+ = VREF+ and VR-= AVSS, channel = (AVCC - AVSS) / 2, end seq.
ADC12IE = BIT4; // Enable ADC12IFG.4
ADC12CTL0 |= ENC; // Enable conversions
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