PWM外设不仅可以输出PWM波，还可以输入信号实现捕获测量

发表于 2024-9-9 21:58

捕获输入通道和PWM输出通道共用引脚和计数器。计数器可以是上或下计数方式。如果输入通道有上升沿或下降沿跳变时，捕获功能将PWM计数器值分别锁存到RCAPDATn (PWM_RCAPDATn[15:0]) 或FCAPDATn (PWM_FCAPDATn[15:0]) 寄存器。如果上升沿或下降沿锁存发生并且相应通道n的上升沿
或下降沿中断使能位被设置，即CAPRIENn (PWM_CAPIEN[5:0])设置上升沿中断使能或CAPFIENn(PWM_CAPIEN[13:8])设置下降沿中断使能，捕获功能将产生一个中断CAP_INT (使用PWM_INT向量)。当上升沿或下降沿锁存发生，相应的PWM计数器是否重载PWM_PERIODn值，取决于RCRLDENn或 FCRLDENn 的设置， RCRLDENn 和 FCRLDENn 分别位于 PWM_CAPCTL[21:16] 和PWM_CAPCTL[29:24]。
注：相应的GPIO引脚必须通过使能相应的捕获通道n来配置它的捕获功能，捕获通道使能设置位为CAPINENn (PWM_CAPINEN[5:0])。

在这个例子中，捕获计数器被设置成PWM下计数器类型，而且周期PERIOD被设置成8，所以这个计数器计数的方向是从上到下的，从8到0。当输入捕获引脚检测到一个下降沿时，捕获功能把计数器数值锁存到PWM_FCAPDATn中。当输入捕获引脚检测到一个上升沿，它锁存计数器数值到PWM_RCAPDATn中。在这个时序框图中，最开始检测到的是一个下降沿信号，因为使能了FCRLDENn，捕获器就会重新加载计数器的数值，数值为周期值（PERIOD）。但是在第二次下降沿时，计数器就不会重新被加载，这是因为关闭了FCRLDENn。在这个例子中，计数器在捕获到上升沿时也被重新加载了，原因是RCRLDENn也被使能了。
另外，这种情况如果是设为向上计数方式，计数器将重载零并向上计数到PERIOD值。
当上升沿在通道n被检测到时，相应位CRLIFn
(PWM_CAPIF[5:0])将被硬件置位。同样，通道n检测到下降沿时，相应位CFLIFn (PWM_CAPIF[13:8])被硬件置位。CRLIFn和CFLIFn可以通过软件写1清除。如果CRLIFn被置位并且CAPRIENn被使能，捕获功能将产生一个中断。如果CFLIFn被置位并且CAPFIENn被使能，捕获功能也将产生一个中断。
在本图没有描述的一个情况是：当CRLIF已经被置位了，如果上升锁存再次发生了，运行状态寄存器CRLIFOVn (PWM_CAPSTS[5:0])将通过硬件被置起，来指示CAPRIF超载。同理，当下降锁存再次发生，对于中断标志CFLIF和超载状态CFLIFOVn (BPWM_CAPSTS[13:8])，也会发生相同的硬件操作。

发表于 2024-9-9 21:59

发表于 2024-9-9 21:59

另外捕获也可以支持DMA功能，这样就可以自动完成捕获数据转移了。

发表于 2024-9-9 22:03

复制

/**************************************************************************//**

 * [url=home.php?mod=space&uid=288409]@file[/url]     main.c

 * [url=home.php?mod=space&uid=895143]@version[/url]  V1.00

 * $Revision: 9 $

 * $Date: 18/07/19 2:15p $

 * [url=home.php?mod=space&uid=247401]@brief[/url]    Capture the PWM0 Channel 0 waveform by PWM0 Channel 2.

 *

 * SPDX-License-Identifier: Apache-2.0

 * [url=home.php?mod=space&uid=17282]@CopyRight[/url] (C) 2018 Nuvoton Technology Corp. All rights reserved.

 ******************************************************************************/

#include <stdio.h>

#include "NuMicro.h"



/*---------------------------------------------------------------------------------------------------------*/

/* Macro, type and constant definitions                                                                    */

/*---------------------------------------------------------------------------------------------------------*/

#define PLL_CLOCK           96000000



/*---------------------------------------------------------------------------------------------------------*/

/* Global variables                                                                                        */

/*---------------------------------------------------------------------------------------------------------*/





/*--------------------------------------------------------------------------------------*/

/* Capture function to calculate the input waveform information                         */

/* u32Count[4] : Keep the internal counter value when input signal rising / falling     */

/*               happens                                                                */

/*                                                                                      */

/* time    A    B     C     D                                                           */

/*           ___   ___   ___   ___   ___   ___   ___   ___                              */

/*      ____|   |_|   |_|   |_|   |_|   |_|   |_|   |_|   |_____                        */

/* index              0 1   2 3                                                         */

/*                                                                                      */

/* The capture internal counter down count from 0x10000, and reload to 0x10000 after    */

/* input signal falling happens (Time B/C/D)                                            */

/*--------------------------------------------------------------------------------------*/

void CalPeriodTime(PWM_T *PWM, uint32_t u32Ch)

{

    uint16_t u32Count[4];

    uint32_t u32i;

    uint16_t u16RisingTime, u16FallingTime, u16HighPeriod, u16LowPeriod, u16TotalPeriod;

    uint32_t u32TimeOutCount;



    /* Clear Capture Falling Indicator (Time A) */

    PWM_ClearCaptureIntFlag(PWM, u32Ch, PWM_CAPTURE_INT_FALLING_LATCH);



    /* setup timeout */

    u32TimeOutCount = SystemCoreClock;



    /* Wait for Capture Falling Indicator  */

    while((PWM0->CAPIF & PWM_CAPIF_CFLIF2_Msk) == 0)

    {

        if(u32TimeOutCount == 0)

        {

            printf("\nSomething is wrong, please check if pin connection is correct. \n");

            while(1);

        }

        u32TimeOutCount--;

    }



    /* Clear Capture Falling Indicator (Time B)*/

    PWM_ClearCaptureIntFlag(PWM, u32Ch, PWM_CAPTURE_INT_FALLING_LATCH);



    u32i = 0;



    while(u32i < 4)

    {

        /* Wait for Capture Falling Indicator */

        while(PWM_GetCaptureIntFlag(PWM, u32Ch) < 2);



        /* Clear Capture Falling and Rising Indicator */

        PWM_ClearCaptureIntFlag(PWM, u32Ch, PWM_CAPTURE_INT_FALLING_LATCH | PWM_CAPTURE_INT_RISING_LATCH);



        /* Get Capture Falling Latch Counter Data */

        u32Count[u32i++] = PWM_GET_CAPTURE_FALLING_DATA(PWM, u32Ch);



        /* Wait for Capture Rising Indicator */

        while(PWM_GetCaptureIntFlag(PWM, u32Ch) < 2);



        /* Clear Capture Rising Indicator */

        PWM_ClearCaptureIntFlag(PWM, u32Ch, PWM_CAPTURE_INT_RISING_LATCH);



        /* Get Capture Rising Latch Counter Data */

        u32Count[u32i++] = PWM_GET_CAPTURE_RISING_DATA(PWM, u32Ch);

    }



    u16RisingTime = u32Count[1];



    u16FallingTime = u32Count[0];



    u16HighPeriod = u32Count[1] - u32Count[2];



    u16LowPeriod = 0x10000 - u32Count[1];



    u16TotalPeriod = 0x10000 - u32Count[2];



    printf("\nPWM generate: \nHigh Period=19199 ~ 19201, Low Period=44799 ~ 44801, Total Period=63999 ~ 64001\n");

    printf("\nCapture Result: Rising Time = %d, Falling Time = %d \nHigh Period = %d, Low Period = %d, Total Period = %d.\n\n",

           u16RisingTime, u16FallingTime, u16HighPeriod, u16LowPeriod, u16TotalPeriod);

    if((u16HighPeriod < 19199) || (u16HighPeriod > 19201)

            || (u16LowPeriod < 44799) || (u16LowPeriod > 44801)

            || (u16TotalPeriod < 63999) || (u16TotalPeriod > 64001))

        printf("Capture Test Fail!!\n");

    else

        printf("Capture Test Pass!!\n");

}



void SYS_Init(void)

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init System Clock                                                                                       */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Enable HIRC clock */

    CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);



    /* Waiting for HIRC clock ready */

    CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);



    /* Switch HCLK clock source to HIRC and HCLK source divide 1 */

    CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));



    /* Select HIRC as the clock source of UART0 */

    CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART0SEL_HIRC, CLK_CLKDIV0_UART0(1));



    /* Set core clock as PLL_CLOCK from PLL (no PLL in rev. B & C) */

//    CLK_SetCoreClock(PLL_CLOCK);



    /* Waiting for PLL clock ready */

//    CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);



    /* Enable UART peripheral clock */

    CLK_EnableModuleClock(UART0_MODULE);



    /* Enable PWM0 module clock */

    CLK_EnableModuleClock(PWM0_MODULE);



    /*---------------------------------------------------------------------------------------------------------*/

    /* PWM clock frequency configuration                                                                       */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Select HCLK clock source as PLL and and HCLK clock divider as 2 */

//    CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL, CLK_CLKDIV0_HCLK(2));



    /* PWM clock frequency can be set equal or double to HCLK by choosing case 1 or case 2 */

    /* case 1.PWM clock frequency is set equal to HCLK: select PWM module clock source as PCLK */

    CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0);



    /* case 2.PWM clock frequency is set double to HCLK: select PWM module clock source as PLL */

//    CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PLL, 0);

    /*---------------------------------------------------------------------------------------------------------*/



    /* Reset PWM0 module */

    SYS_ResetModule(PWM0_RST);



    /* Update System Core Clock */

    SystemCoreClockUpdate();



    /*---------------------------------------------------------------------------------------------------------*/

    /* Init I/O Multi-function                                                                                 */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Set PB multi-function pins for UART0 RXD=PB.12 and TXD=PB.13 */

    SYS->GPB_MFPH = (SYS->GPB_MFPH & ~(SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk)) |

                    (SYS_GPB_MFPH_PB12MFP_UART0_RXD | SYS_GPB_MFPH_PB13MFP_UART0_TXD);



    /* Set PB multi-function pins for PWM0 Channel 0 and 2 */

    SYS->GPB_MFPL = (SYS->GPB_MFPL & ~(SYS_GPB_MFPL_PB5MFP_Msk | SYS_GPB_MFPL_PB3MFP_Msk)) |

                    (SYS_GPB_MFPL_PB5MFP_PWM0_CH0 | SYS_GPB_MFPL_PB3MFP_PWM0_CH2);

}



void UART0_Init()

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init UART                                                                                               */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Reset UART module */

    SYS_ResetModule(UART0_RST);



    /* Configure UART0 and set UART0 baud rate */

    UART_Open(UART0, 115200);

}



/*---------------------------------------------------------------------------------------------------------*/

/*  Main Function                                                                                          */

/*---------------------------------------------------------------------------------------------------------*/

int32_t main(void)

{

    uint32_t u32TimeOutCount;



    /* Init System, IP clock and multi-function I/O

       In the end of SYS_Init() will issue SYS_LockReg()

       to lock protected register. If user want to write

       protected register, please issue SYS_UnlockReg()

       to unlock protected register if necessary */



    /* Unlock protected registers */

    SYS_UnlockReg();



    /* Init System, IP clock and multi-function I/O */

    SYS_Init();



    /* Lock protected registers */

    SYS_LockReg();



    /* Init UART to 115200-8n1 for print message */

    UART0_Init();



    printf("\n\nCPU [url=home.php?mod=space&uid=72445]@[/url] %dHz(PLL@ %dHz)\n", SystemCoreClock, PllClock);

    printf("PWM0 clock is from %s\n", (CLK->CLKSEL2 & CLK_CLKSEL2_PWM0SEL_Msk) ? "PCLK" : "PLL");

    printf("+------------------------------------------------------------------------+\n");

    printf("|                          PWM Driver Sample Code                        |\n");

    printf("|                                                                        |\n");

    printf("+------------------------------------------------------------------------+\n");

    printf("  This sample code will use PWM0 channel 2 to capture\n  the signal from PWM0 channel 0.\n");

    printf("  I/O configuration:\n");

    printf("    PWM0 channel 2(PB.3) <--> PWM0 channel 0(PB.5)\n\n");

    printf("Use PWM0 Channel 2(PB.3) to capture the PWM0 Channel 0(PB.5) Waveform\n");



    while(1)

    {

        printf("\n\nPress any key to start PWM Capture Test\n");

        getchar();



        /*--------------------------------------------------------------------------------------*/

        /* Set the PWM0 Channel 0 as PWM output function.                                       */

        /*--------------------------------------------------------------------------------------*/



        /* Assume PWM output frequency is 250Hz and duty ratio is 30%, user can calculate PWM settings by follows.

           duty ratio = (CMR+1)/(CNR+1)

           cycle time = CNR+1

           High level = CMR+1

           PWM clock source frequency from PLL is 48,000,000

           (CNR+1) = PWM clock source frequency/prescaler/PWM output frequency

                   = 48,000,000/3/250 = 64,000

           (Note: CNR is 16 bits, so if calculated value is larger than 65536, user should increase prescale value.)

           CNR = 64,000

           duty ratio = 30% ==> (CMR+1)/(CNR+1) = 30%

           CMR = 19,200

           Prescale value is 4 : prescaler= 5

        */



        /* set PWM0 channel 0 output configuration */

        PWM_ConfigOutputChannel(PWM0, 0, 250, 30);



        /* Enable PWM Output path for PWM0 channel 0 */

        PWM_EnableOutput(PWM0, PWM_CH_0_MASK);



        /* Enable Timer for PWM0 channel 0 */

        PWM_Start(PWM0, PWM_CH_0_MASK);



        /*--------------------------------------------------------------------------------------*/

        /* Set the PWM0 channel 2 for capture function                                          */

        /*--------------------------------------------------------------------------------------*/

        /* If input minimum frequency is 250Hz, user can calculate capture settings by follows.

           Capture clock source frequency = PLL = 48,000,000 in the sample code.

           (CNR+1) = Capture clock source frequency/prescaler/minimum input frequency

                   = 48,000,000/3/250 = 64,000

           (Note: CNR is 16 bits, so if calculated value is larger than 65536, user should increase prescale value.)

           CNR = 0xFFFF

           (Note: In capture mode, user should set CNR to 0xFFFF to increase capture frequency range.)



           Capture unit time = 1/Capture clock source frequency/prescaler

           62.5ns = 1/48,000,000/3

        */



        /* set PWM0 channel 2 capture configuration */

        PWM_ConfigCaptureChannel(PWM0, 2, 62, 0);



        /* Enable Timer for PWM0 channel 2 */

        PWM_Start(PWM0, PWM_CH_2_MASK);



        /* Enable Capture Function for PWM0 channel 2 */

        PWM_EnableCapture(PWM0, PWM_CH_2_MASK);



        /* Enable falling capture reload */

        PWM0->CAPCTL |= PWM_CAPCTL_FCRLDEN2_Msk;



        /* setup timeout */

        u32TimeOutCount = SystemCoreClock;



        /* Wait until PWM0 channel 2 Timer start to count */

        while((PWM0->CNT[2]) == 0)

        {

            if(u32TimeOutCount == 0)

            {

                printf("PWM encounters some errors, please check it. \n");

                while(1);

            }

            u32TimeOutCount--;

        }



        /* Capture the Input Waveform Data */

        CalPeriodTime(PWM0, 2);

        /*---------------------------------------------------------------------------------------------------------*/

        /* Stop PWM0 channel 0 (Recommended procedure method 1)                                                    */

        /* Set PWM Timer loaded value(Period) as 0. When PWM internal counter(CNT) reaches to 0, disable PWM Timer */

        /*---------------------------------------------------------------------------------------------------------*/

        /* Set PWM0 channel 0 loaded value as 0 */

        PWM_Stop(PWM0, PWM_CH_0_MASK);



        /* Wait until PWM0 channel 0 Timer Stop */

        while((PWM0->CNT[0] & PWM_CNT_CNT_Msk) != 0)

        {

            if(u32TimeOutCount == 0)

            {

                printf("PWM encounters some errors, please check it. \n");

                while(1);

            }

            u32TimeOutCount--;

        }



        /* Disable Timer for PWM0 channel 0 */

        PWM_ForceStop(PWM0, PWM_CH_0_MASK);



        /* Disable PWM Output path for PWM0 channel 0 */

        PWM_DisableOutput(PWM0, PWM_CH_0_MASK);



        /*---------------------------------------------------------------------------------------------------------*/

        /* Stop PWM0 channel 2 (Recommended procedure method 1)                                                    */

        /* Set PWM Timer loaded value(Period) as 0. When PWM internal counter(CNT) reaches to 0, disable PWM Timer */

        /*---------------------------------------------------------------------------------------------------------*/



        /* Set loaded value as 0 for PWM0 channel 2 */

        PWM_Stop(PWM0, PWM_CH_2_MASK);



        /* setup timeout */

        u32TimeOutCount = SystemCoreClock;



        /* Wait until PWM0 channel 2 current counter reach to 0 */

        while((PWM0->CNT[2] & PWM_CNT_CNT_Msk) != 0)

        {

            if(u32TimeOutCount == 0)

            {

                printf("PWM encounters some errors, please check it. \n");

                while(1);

            }

            u32TimeOutCount--;

        }



        /* Disable Timer for PWM0 channel 2 */

        PWM_ForceStop(PWM0, PWM_CH_2_MASK);



        /* Disable Capture Function and Capture Input path for  PWM0 channel 2*/

        PWM_DisableCapture(PWM0, PWM_CH_2_MASK);



        /* Clear Capture Interrupt flag for PWM0 channel 2 */

        PWM_ClearCaptureIntFlag(PWM0, 2, PWM_CAPTURE_INT_FALLING_LATCH);

    }

}

发表于 2024-9-9 22:04

接下来再展示一下捕获结果通过PDMA传输

复制

/**************************************************************************//**

 * @file     main.c

 * @version  V1.00

 * $Revision: 11 $

 * $Date: 18/07/19 2:18p $

 * @brief    Capture the PWM0 Channel 0 waveform by PWM0 Channel 2, and use PDMA to transfer captured data.

 *

 * SPDX-License-Identifier: Apache-2.0

 * @copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.

 ******************************************************************************/

#include <stdio.h>

#include "NuMicro.h"



/*---------------------------------------------------------------------------------------------------------*/

/* Macro, type and constant definitions                                                                    */

/*---------------------------------------------------------------------------------------------------------*/

#define PLL_CLOCK       96000000



/*---------------------------------------------------------------------------------------------------------*/

/* Global variables                                                                                        */

/*---------------------------------------------------------------------------------------------------------*/

uint16_t g_au16Count[4];

volatile uint32_t g_u32IsTestOver = 0;





/**

 * @brief       PDMA IRQ Handler

 *

 * @param       None

 *

 * [url=home.php?mod=space&uid=266161]@return[/url]      None

 *

 * [url=home.php?mod=space&uid=1543424]@Details[/url]     ISR to handle PDMA interrupt event

 */

void PDMA_IRQHandler(void)

{

    uint32_t status = PDMA_GET_INT_STATUS(PDMA);



    if(status & 0x1)    /* abort */

    {

        if(PDMA_GET_ABORT_STS(PDMA) & 0x1)

            g_u32IsTestOver = 2;

        PDMA_CLR_ABORT_FLAG(PDMA, PDMA_ABTSTS_ABTIF0_Msk);

    }

    else if(status & 0x2)      /* done */

    {

        if(PDMA_GET_TD_STS(PDMA) & 0x1)

            g_u32IsTestOver = 1;

        PDMA_CLR_TD_FLAG(PDMA, PDMA_TDSTS_TDIF0_Msk);

    }

    else

        printf("unknown interrupt !!\n");

}



/*--------------------------------------------------------------------------------------*/

/* Capture function to calculate the input waveform information                         */

/* g_au16Count[4] : Keep the internal counter value when input signal rising / falling     */

/*               happens                                                                */

/*                                                                                      */

/* time    A    B     C     D                                                           */

/*           ___   ___   ___   ___   ___   ___   ___   ___                              */

/*      ____|   |_|   |_|   |_|   |_|   |_|   |_|   |_|   |_____                        */

/* index              0 1   2 3                                                         */

/*                                                                                      */

/* The capture internal counter down count from 0x10000, and reload to 0x10000 after    */

/* input signal falling happens (Time B/C/D)                                            */

/*--------------------------------------------------------------------------------------*/

void CalPeriodTime(PWM_T *PWM, uint32_t u32Ch)

{

    uint16_t u16RisingTime, u16FallingTime, u16HighPeriod, u16LowPeriod, u16TotalPeriod;

    uint32_t u32TimeOutCount;



    g_u32IsTestOver = 0;



    /* setup timeout */

    u32TimeOutCount = SystemCoreClock;



    /* Wait PDMA interrupt (g_u32IsTestOver will be set at IRQ_Handler function) */

    while(g_u32IsTestOver == 0)

    {

        if(u32TimeOutCount == 0)

        {

            printf("\nSomething is wrong, please check if pin connection is correct. \n");

            while(1);

        }

        u32TimeOutCount--;

    }



    u16RisingTime = g_au16Count[1];



    u16FallingTime = g_au16Count[0];



    u16HighPeriod = g_au16Count[1] - g_au16Count[2];



    u16LowPeriod = 0x10000 - g_au16Count[1];



    u16TotalPeriod = 0x10000 - g_au16Count[2];



    printf("\nPWM generate: \nHigh Period=19199 ~ 19201, Low Period=44799 ~ 44801, Total Period=63999 ~ 64001\n");

    printf("\nCapture Result: Rising Time = %d, Falling Time = %d \nHigh Period = %d, Low Period = %d, Total Period = %d.\n\n",

           u16RisingTime, u16FallingTime, u16HighPeriod, u16LowPeriod, u16TotalPeriod);

    if((u16HighPeriod < 19199) || (u16HighPeriod > 19201)

            || (u16LowPeriod < 44799) || (u16LowPeriod > 44801)

            || (u16TotalPeriod < 63999) || (u16TotalPeriod > 64001))

        printf("Capture Test Fail!!\n");

    else

        printf("Capture Test Pass!!\n");

}



void SYS_Init(void)

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init System Clock                                                                                       */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Enable HIRC clock */

    CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);



    /* Waiting for HIRC clock ready */

    CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);



    /* Switch HCLK clock source to HIRC and HCLK source divide 1 */

    CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));



    /* Select HIRC as the clock source of UART0 */

    CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART0SEL_HIRC, CLK_CLKDIV0_UART0(1));



    /* Set core clock as PLL_CLOCK from PLL (no PLL in rev. B & C) */

//    CLK_SetCoreClock(PLL_CLOCK);



    /* Waiting for PLL clock ready */

//    CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);



    /* Enable UART peripheral clock */

    CLK_EnableModuleClock(UART0_MODULE);



    /*---------------------------------------------------------------------------------------------------------*/

    /* PWM clock frequency configuration                                                                       */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Select HCLK clock source as PLL and and HCLK clock divider as 2 */

//    CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL, CLK_CLKDIV0_HCLK(2));



    /* PWM clock frequency can be set equal or double to HCLK by choosing case 1 or case 2 */

    /* case 1.PWM clock frequency is set equal to HCLK: select PWM module clock source as PCLK */

    CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0);



    /* case 2.PWM clock frequency is set double to HCLK: select PWM module clock source as PLL */

//    CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PLL, 0);

    /*---------------------------------------------------------------------------------------------------------*/



    /* Enable PDMA module clock */

    CLK_EnableModuleClock(PDMA_MODULE);



    /* Enable PWM0 module clock */

    CLK_EnableModuleClock(PWM0_MODULE);



    /* Reset PWM0 module */

    SYS_ResetModule(PWM0_RST);



    /* Reset PDMA module */

    SYS_ResetModule(PDMA_RST);



    /* Update System Core Clock */

    SystemCoreClockUpdate();



    /*---------------------------------------------------------------------------------------------------------*/

    /* Init I/O Multi-function                                                                                 */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Set PB multi-function pins for UART0 RXD=PB.12 and TXD=PB.13 */

    SYS->GPB_MFPH = (SYS->GPB_MFPH & ~(SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk)) |

                    (SYS_GPB_MFPH_PB12MFP_UART0_RXD | SYS_GPB_MFPH_PB13MFP_UART0_TXD);



    /* Set PB multi-function pins for PWM0 Channel 0 and 2 */

    SYS->GPB_MFPL = (SYS->GPB_MFPL & ~(SYS_GPB_MFPL_PB5MFP_Msk | SYS_GPB_MFPL_PB3MFP_Msk)) |

                    (SYS_GPB_MFPL_PB5MFP_PWM0_CH0 | SYS_GPB_MFPL_PB3MFP_PWM0_CH2);

}



void UART0_Init()

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init UART                                                                                               */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Reset UART module */

    SYS_ResetModule(UART0_RST);



    /* Configure UART0 and set UART0 baud rate */

    UART_Open(UART0, 115200);

}



/*---------------------------------------------------------------------------------------------------------*/

/*  Main Function                                                                                          */

/*---------------------------------------------------------------------------------------------------------*/

int32_t main(void)

{

    uint32_t u32TimeOutCount;



    /* Init System, IP clock and multi-function I/O

       In the end of SYS_Init() will issue SYS_LockReg()

       to lock protected register. If user want to write

       protected register, please issue SYS_UnlockReg()

       to unlock protected register if necessary */



    /* Unlock protected registers */

    SYS_UnlockReg();



    /* Init System, IP clock and multi-function I/O */

    SYS_Init();



    /* Lock protected registers */

    SYS_LockReg();



    /* Init UART to 115200-8n1 for print message */

    UART0_Init();



    printf("\n\nCPU @ %dHz(PLL@ %dHz)\n", SystemCoreClock, PllClock);

    printf("PWM0 clock is from %s\n", (CLK->CLKSEL2 & CLK_CLKSEL2_PWM0SEL_Msk) ? "PCLK" : "PLL");

    printf("+------------------------------------------------------------------------+\n");

    printf("|                          PWM Driver Sample Code                        |\n");

    printf("|                                                                        |\n");

    printf("+------------------------------------------------------------------------+\n");

    printf("  This sample code will use PWM0 channel 2 to capture the signal from PWM0 channel 0.\n");

    printf("  And the captured data is transferred by PDMA channel 0.\n");

    printf("  I/O configuration:\n");

    printf("    PWM0 channel 2(PB.3) <--> PWM0 channel 0(PB.5)\n\n");

    printf("Use PWM0 Channel 2(PB.3) to capture the PWM0 Channel 0(PB.5) Waveform\n");



    while(1)

    {

        printf("\n\nPress any key to start PWM Capture Test\n");

        getchar();



        /*--------------------------------------------------------------------------------------*/

        /* Set the PWM0 Channel 0 as PWM output function.                                       */

        /*--------------------------------------------------------------------------------------*/



        /* Assume PWM output frequency is 250Hz and duty ratio is 30%, user can calculate PWM settings by follows.

           duty ratio = (CMR+1)/(CNR+1)

           cycle time = CNR+1

           High level = CMR+1

           PWM clock source frequency from PLL is 48,000,000

           (CNR+1) = PWM clock source frequency/prescaler/PWM output frequency

                   = 48,000,000/3/250 = 64,000

           (Note: CNR is 16 bits, so if calculated value is larger than 65536, user should increase prescale value.)

           CNR = 64,000

           duty ratio = 30% ==> (CMR+1)/(CNR+1) = 30%

           CMR = 19,200

           Prescale value is 4 : prescaler= 5

        */



        /* Set PWM0 channel 0 output configuration */

        PWM_ConfigOutputChannel(PWM0, 0, 250, 30);



        /* Enable PWM Output path for PWM0 channel 0 */

        PWM_EnableOutput(PWM0, PWM_CH_0_MASK);



        /* Enable Timer for PWM0 channel 0 */

        PWM_Start(PWM0, PWM_CH_0_MASK);



        /*--------------------------------------------------------------------------------------*/

        /* Configure PDMA peripheral mode form PWM to memory                                    */

        /*--------------------------------------------------------------------------------------*/

        /* Open Channel 0 */

        PDMA_Open(PDMA, 0x1);



        /* Transfer width is half word(16 bit) and transfer count is 4 */

        PDMA_SetTransferCnt(PDMA, 0, PDMA_WIDTH_16, 4);



        /* Set source address as PWM capture channel PDMA register(no increment) and destination address as g_au16Count array(increment) */

        PDMA_SetTransferAddr(PDMA, 0, (uint32_t)&PWM0->PDMACAP2_3, PDMA_SAR_FIX, (uint32_t)&g_au16Count[0], PDMA_DAR_INC);



        /* Select PDMA request source as PWM RX(PWM0 channel 2 should be PWM0 pair 2) */

        PDMA_SetTransferMode(PDMA, 0, PDMA_PWM0_P2_RX, FALSE, 0);



        /* Set PDMA as single request type for PWM */

        PDMA_SetBurstType(PDMA, 0, PDMA_REQ_SINGLE, PDMA_BURST_4);



        PDMA_EnableInt(PDMA, 0, PDMA_INT_TRANS_DONE);

        NVIC_EnableIRQ(PDMA_IRQn);



        /* Enable PDMA for PWM0 channel 2 capture function, and set capture order as falling first, */

        /* And select capture mode as both rising and falling to do PDMA transfer. */

        PWM_EnablePDMA(PWM0, 2, FALSE, PWM_CAPTURE_PDMA_RISING_FALLING_LATCH);



        /*--------------------------------------------------------------------------------------*/

        /* Set the PWM0 channel 2 for capture function                                          */

        /*--------------------------------------------------------------------------------------*/

        /* If input minimum frequency is 250Hz, user can calculate capture settings by follows.

           Capture clock source frequency = PLL = 48,000,000 in the sample code.

           (CNR+1) = Capture clock source frequency/prescaler/minimum input frequency

                   = 48,000,000/3/250 = 64,000

           (Note: CNR is 16 bits, so if calculated value is larger than 65536, user should increase prescale value.)

           CNR = 0xFFFF

           (Note: In capture mode, user should set CNR to 0xFFFF to increase capture frequency range.)



           Capture unit time = 1/Capture clock source frequency/prescaler

           62.5ns = 1/48,000,000/3

        */



        /* Set PWM0 channel 2 capture configuration */

        PWM_ConfigCaptureChannel(PWM0, 2, 62, 0);



        /* Enable Timer for PWM0 channel 2 */

        PWM_Start(PWM0, PWM_CH_2_MASK);



        /* Enable Capture Function for PWM0 channel 2 */

        PWM_EnableCapture(PWM0, PWM_CH_2_MASK);



        /* Enable falling capture reload */

        PWM0->CAPCTL |= PWM_CAPCTL_FCRLDEN2_Msk;



        /* setup timeout */

        u32TimeOutCount = SystemCoreClock;



        /* Wait until PWM0 channel 2 Timer start to count */

        while((PWM0->CNT[2]) == 0)

        {

            if(u32TimeOutCount == 0)

            {

                printf("PWM encounters some errors, please check it. \n");

                while(1);

            }

            u32TimeOutCount--;

        }



        /* Capture the Input Waveform Data */

        CalPeriodTime(PWM0, 2);

        /*---------------------------------------------------------------------------------------------------------*/

        /* Stop PWM0 channel 0 (Recommended procedure method 1)                                                    */

        /* Set PWM Timer loaded value(Period) as 0. When PWM internal counter(CNT) reaches to 0, disable PWM Timer */

        /*---------------------------------------------------------------------------------------------------------*/



        /* Set PWM0 channel 0 loaded value as 0 */

        PWM_Stop(PWM0, PWM_CH_0_MASK);



        /* Wait until PWM0 channel 0 Timer Stop */

        while((PWM0->CNT[0] & PWM_CNT_CNT_Msk) != 0)

        {

            if(u32TimeOutCount == 0)

            {

                printf("PWM encounters some errors, please check it. \n");

                while(1);

            }

            u32TimeOutCount--;

        }



        /* Disable Timer for PWM0 channel 0 */

        PWM_ForceStop(PWM0, PWM_CH_0_MASK);



        /* Disable PWM Output path for PWM0 channel 0 */

        PWM_DisableOutput(PWM0, PWM_CH_0_MASK);



        /*---------------------------------------------------------------------------------------------------------*/

        /* Stop PWM0 channel 2 (Recommended procedure method 1)                                                    */

        /* Set PWM Timer loaded value(Period) as 0. When PWM internal counter(CNT) reaches to 0, disable PWM Timer */

        /*---------------------------------------------------------------------------------------------------------*/



        /* Set loaded value as 0 for PWM0 channel 2 */

        PWM_Stop(PWM0, PWM_CH_2_MASK);



        /* Wait until PWM0 channel 2 current counter reach to 0 */

        while((PWM0->CNT[2] & PWM_CNT_CNT_Msk) != 0)

        {

            if(u32TimeOutCount == 0)

            {

                printf("PWM encounters some errors, please check it. \n");

                while(1);

            }

            u32TimeOutCount--;

        }



        /* Disable Timer for PWM0 channel 2 */

        PWM_ForceStop(PWM0, PWM_CH_2_MASK);



        /* Disable Capture Function and Capture Input path for  PWM0 channel 2*/

        PWM_DisableCapture(PWM0, PWM_CH_2_MASK);



        /* Clear Capture Interrupt flag for PWM0 channel 2 */

        PWM_ClearCaptureIntFlag(PWM0, 2, PWM_CAPTURE_INT_FALLING_LATCH);



        /* Disable PDMA NVIC */

        NVIC_DisableIRQ(PDMA_IRQn);



        PDMA_Close(PDMA);

    }

}

发表于 2024-9-11 21:30

之前使用外部计数模式做过，测量范围很高的

发表于 2025-8-30 13:38

PWM 外设功能多样，除输出 PWM 波用于电机调速、灯光调光等，还能通过输入捕获功能，测量外部信号的频率、占空比等参数，拓展应用场景。

发表于 2025-9-23 18:35

PWM 外设的捕获功能能测量输入信号参数，先配置对应 IO 为捕获模式并选触发边沿。当检测到信号边沿时，会记录定时器当前值，通过两次捕获值差计算周期（频率），单周期内高低电平捕获值差算占空比。可用于测量电机转速、传感器脉冲信号等，无需额外硬件，简化电路设计。

发表于 2025-9-26 13:52

PWM 外设可配置为输入捕获模式，通过检测外部信号的跳变沿（上升 / 下降）触发捕获。此时计数器值会被锁存，通过计算两次捕获的时间差，可测得信号周期、频率及脉冲宽度。该功能扩展了 PWM 应用，适用于转速测量、传感器信号解析等场景，无需额外硬件。

发表于 2025-9-29 13:53

我注意到了，当捕获功能检测到上升沿或下降沿时，可以产生中断，这对于实时控制应用来说非常有用。

发表于 2025-9-29 17:24

学习了，原来PWM外设不仅可以输出PWM波，还可以通过捕获功能来测量输入信号

发表于 2025-10-2 11:43

PWM 外设通过输入捕获功能可测量外部信号。配置为输入模式时，能捕获信号边沿（上升 / 下降沿），记录对应时刻计时器值，计算周期（两同边沿间隔）和占空比（高低电平时间比）。适用于转速测量、脉冲计数等场景，无需额外硬件，简化电路设计。

[牛人杂谈] PWM外设不仅可以输出PWM波，还可以输入信号实现捕获测量

相关帖子

浏览过的版块