K325T，外部时钟经MMCM之后连接BUFG，再驱动整个芯片，有300多K的FF以及700多个DSP。
预期跑400M，但最终报告只能跑300M，好像是时钟延迟造成的，有什么好办法？
Path Type: Max at Slow Process Corner
Requirement: 2.500ns
Data Path Delay: 3.282ns (logic 1.027ns (31.297%) route 2.255ns (68.703%))
Logic Levels: 6 (CARRY4=5 LUT2=1)
Clock Path Skew: -0.319ns (DCD - SCD + CPR)
Destination Clock Delay (DCD): 4.672ns
Source Clock Delay (SCD): 5.348ns
Clock Pessimism Removal (CPR): 0.357ns
Clock Uncertainty: 0.037ns ((TSJ^2 + DJ^2)^1/2) / 2 + PE
Total System Jitter (TSJ): 0.071ns
Discrete Jitter (DJ): 0.025ns
Phase Error (PE): 0.000ns
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