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我是Unitop猎头公司的aleen，很高兴加入论坛。现在正在为上海一家美资500强企业寻找ASIC verification 工程师，机会非常好，有意向的工程师，请加我msn Aleen.1@hotmail.com<br /><br />In a team environment, learn the design and verification environment of multiple ASIC/FPGA chips<br />Provide failure analysis support in response to field and manufacturing failures<br />Utilize existing test suites to drive debug efforts<br />Create new verification tests as necessary to augment existing verification test suites in response to failures observed<br />Work directly with field support, manufacturing personnel, and design engineers around the globe<br />Communicate status and root-cause to the technical team lead<br /><br />Skills<br /><br />Working knowledge of either the Verilog HDL or VHDL languages.<br />Demonstrated knowledge of C/C++<br />Familiar with the Cadence NC-Verilog simulator and a graphical waveform viewer.<br />Excellent communication, technical skills<br />Strong sense of urgency and teamwork<br />Ability to work well both alone or in a small cross-functional team<br /><br />Education Required: Bachelor of Science in Electrical or Computer Engineering<br /><br />Experience Required: 3 years of semi-custom or FPGA chip design and/or chip verification experience<br /><br /><br /><br /><br /><br /><br /><br /> |
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