- `timescale 1ns / 1ps
- //////////////////////////////////////////////////////////////////////////////////
- // Company:
- // Engineer:
- //
- // Create Date: 15:33:18 09/28/2010
- // Design Name:
- // Module Name: dac_inf
- // Project Name:
- // Target Devices:
- // Tool versions:
- // Description:
- //
- // Dependencies:
- //
- // Revision:
- // Revision 0.01 - File Created
- // Additional Comments:
- //////////////////////////////////////////////////////////////////////////////////
- module rx_link_lifi(
- input sys_clk ,
- input rst ,
-
- output O_adc_clk_p ,
- output O_adc_clk_n ,
-
- input I_adc_clk ,
- input [13:0] I_adc_data ,
-
- output [7:0] O_adc_data ,
- output O_adc_en ,
- output O_crc_err ,
- output [31:0] O_crc_err_num,
- output [31:0] O_ethc_num ,
-
- input [13:0] I_reg_high_gate,
- //-------------------------------------
- input [7:0] I_hdm960_gc ,
- output [15:0] O_power_out ,
- output [7:0] O_hdm960_gc
-
-
-
- );
-
-
- //--------------------------------------------------------------
- wire [13:0] inf_adc_data ;
- wire inf_adc_en ;
-
- wire [7:0] hd_gmii_data ;
- wire hd_gmii_dv ;
- wire hd_gmii_sop ;
- wire hd_gmii_eop ;
-
- wire [13:0] adc_add_data ;
- wire [13:0] power_gate_calu ;
- wire [13:0] eq_adc_data ;
- wire capture_en_rising;
- wire s_crc_check_ok ;
-
- reg [7:0] value_in_d1 ;
- reg [7:0] value_in_d2 ;
- reg [7:0] value_in_d3 ;
- reg [7:0] value_in_d4 ;
- reg [7:0] value_in_d5 ;
- reg [7:0] value_in_d6 ;
- reg [7:0] value_in_d7 ;
- reg [7:0] value_in_d8 ;
- reg [7:0] value_in_d9 ;
- reg [7:0] value_in_d10 ;
- reg [7:0] value_in_d11 ;
- reg [7:0] value_in_d12 ;
- reg [7:0] value_in_d13 ;
- reg [7:0] value_in_d14 ;
- reg [7:0] value_in_d15 ;
- reg [7:0] value_in_d16 ;
- reg [7:0] value_in_d17 ;
- reg [7:0] value_in_d18 ;
- reg [7:0] value_in_d19 ;
- reg [7:0] value_in_d20 ;
- reg [7:0] value_in_d21 ;
- reg [7:0] value_in_d22 ;
- reg [7:0] value_in_d23 ;
- reg [7:0] value_in_d24 ;
- reg [7:0] value_in_d25 ;
- reg [7:0] value_in_d26 ;
- reg [7:0] value_in_d27 ;
- reg [7:0] value_in_d28 ;
- reg [7:0] value_in_d29 ;
- reg [7:0] value_in_d30 ;
- reg [7:0] value_in_d31 ;
- reg [7:0] value_in_d32 ;
- reg [7:0] value_in_d33 ;
- reg [7:0] value_in_d34 ;
- reg [7:0] value_in_d35 ;
- reg value_in_en_d1 ;
- reg value_in_en_d2 ;
- reg value_in_en_d3 ;
- reg value_in_en_d4 ;
- reg value_in_en_d5 ;
- reg value_in_en_d6 ;
- reg value_in_en_d7 ;
- reg value_in_en_d8 ;
- reg value_in_en_d9 ;
- reg value_in_en_d10 ;
- reg value_in_en_d11 ;
- reg value_in_en_d12 ;
- reg value_in_en_d13 ;
- reg value_in_en_d14 ;
- reg value_in_en_d15 ;
- reg value_in_en_d16 ;
- reg value_in_en_d17 ;
- reg value_in_en_d18 ;
- reg value_in_en_d19 ;
- reg value_in_en_d20 ;
- reg value_in_en_d21 ;
- reg value_in_en_d22 ;
- reg value_in_en_d23 ;
- reg value_in_en_d24 ;
- reg value_in_en_d25 ;
- reg value_in_en_d26 ;
- reg value_in_en_d27 ;
- reg value_in_en_d28 ;
- reg value_in_en_d29 ;
- reg value_in_en_d30 ;
- reg value_in_en_d31 ;
- reg value_in_en_d32 ;
- reg value_in_en_d33 ;
- reg value_in_en_d34 ;
- reg value_in_en_d35 ;
- reg value_in_sop_d1 ;
- reg value_in_sop_d2 ;
- reg value_in_sop_d3 ;
- reg value_in_sop_d4 ;
- reg value_in_sop_d5 ;
- reg value_in_sop_d6 ;
- reg value_in_sop_d7 ;
- reg value_in_sop_d8 ;
- reg value_in_sop_d9 ;
- reg value_in_sop_d10 ;
- reg value_in_sop_d11 ;
- reg value_in_sop_d12 ;
- reg value_in_sop_d13 ;
- reg value_in_sop_d14 ;
- reg value_in_sop_d15 ;
- reg value_in_sop_d16 ;
- reg value_in_sop_d17 ;
- reg value_in_sop_d18 ;
- reg value_in_sop_d19 ;
- reg value_in_sop_d20 ;
- reg value_in_sop_d21 ;
- reg value_in_sop_d22 ;
- reg value_in_sop_d23 ;
- reg value_in_sop_d24 ;
- reg value_in_sop_d25 ;
- reg value_in_sop_d26 ;
- reg value_in_sop_d27 ;
- reg value_in_sop_d28 ;
- reg value_in_sop_d29 ;
- reg value_in_sop_d30 ;
- reg value_in_sop_d31 ;
- reg value_in_sop_d32 ;
- reg value_in_sop_d33 ;
- reg value_in_sop_d34 ;
- reg value_in_sop_d35 ;
- reg value_in_eop_d1 ;
- reg value_in_eop_d2 ;
- reg value_in_eop_d3 ;
- reg value_in_eop_d4 ;
- reg value_in_eop_d5 ;
- reg value_in_eop_d6 ;
- reg value_in_eop_d7 ;
- reg value_in_eop_d8 ;
- reg value_in_eop_d9 ;
- reg value_in_eop_d10 ;
- reg value_in_eop_d11 ;
- reg value_in_eop_d12 ;
- reg value_in_eop_d13 ;
- reg value_in_eop_d14 ;
- reg value_in_eop_d15 ;
- reg value_in_eop_d16 ;
- reg value_in_eop_d17 ;
- reg value_in_eop_d18 ;
- reg value_in_eop_d19 ;
- reg value_in_eop_d20 ;
- reg value_in_eop_d21 ;
- reg value_in_eop_d22 ;
- reg value_in_eop_d23 ;
- reg value_in_eop_d24 ;
- reg value_in_eop_d25 ;
- reg value_in_eop_d26 ;
- reg value_in_eop_d27 ;
- reg value_in_eop_d28 ;
- reg value_in_eop_d29 ;
- reg value_in_eop_d30 ;
- reg value_in_eop_d31 ;
- reg value_in_eop_d32 ;
- reg value_in_eop_d33 ;
- reg value_in_eop_d34 ;
- reg value_in_eop_d35 ;
-
- //---------------------------------------------------------------
- adc_inf i_adc_inf(
- .sys_clk (sys_clk ) ,
- .rst (rst ) ,
-
- .O_adc_clk_p(O_adc_clk_p ) ,
- .O_adc_clk_n(O_adc_clk_n ) ,
-
- .I_adc_clk (I_adc_clk ) ,
- .I_adc_data (I_adc_data ) ,
-
- .O_adc_data (inf_adc_data ) ,
- .O_adc_en (inf_adc_en )
- );
-
- // add_cons_8191 i_add_cons_8191(
- // .clk(sys_clk ),
- // .a ({inf_adc_data[13],inf_adc_data[13],inf_adc_data}),
- // .b (16'd8191 ),
- // .s (adc_add_data)
- //);
- assign adc_add_data = 14'd16383 - {~inf_adc_data[13],inf_adc_data[12:0]}; //有符号转无符号
-
- rx_packet_extract i_rx_packet_extract(
- .sys_clk (sys_clk ),
- .rst (rst ),
- .I_adc_data (eq_adc_data ),
- .I_adc_en (inf_adc_en ),
- .O_adc_data (hd_gmii_data ),
- .O_adc_data_en (hd_gmii_dv ),
- .O_data_sop (hd_gmii_sop ),
- .O_data_eop (hd_gmii_eop ),
- //-----cpu config--------------------------------
- .I_reg_high_gate (power_gate_calu),
- //----------------------------------------
- .O_capture_en_rising (capture_en_rising),
- //-----power calu--------------------------------
- .O_power_out (O_power_out ),
- .I_hdm960_gc (I_hdm960_gc ),
- .O_hdm960_gc (O_hdm960_gc ),
- .I_crc_check_ok (s_crc_check_ok )
-
- );
-
-
- power_gate_calu i_power_gate_calu(
- .sys_clk (sys_clk ),
- .rst (rst ),
-
- .I_data_in (eq_adc_data ),
- .O_power_gate_out(power_gate_calu)
-
-
- );
-
- eq_pro i_eq_pro(
- .sys_clk (sys_clk ) ,
- .rst (rst ) ,
-
- .I_data_in (adc_add_data) ,
- .O_data_out(eq_adc_data )
- );
-
-
- ge_crc_check i_ge_crc_check(
- .clk (sys_clk ) ,
- .rst (rst ) ,
- .I_gmii_dv (value_in_en_d27 ),//(hd_gmii_dv ) ,
- .I_gmii_data (value_in_d27 ),//(hd_gmii_data ) ,
- .I_gmii_sop (value_in_sop_d27),//(hd_gmii_sop ) ,
- .I_gmii_eop (value_in_eop_d27),//(hd_gmii_eop ) ,
- .O_gmii_data (O_adc_data ) ,
- .O_gmii_valid (O_adc_en ) ,
- .O_crc_err (O_crc_err ) ,
- .O_crc_err_num (O_crc_err_num ) ,
- .O_ethc_num (O_ethc_num ) ,
- .O_crc_check_ok(s_crc_check_ok )
- );
-
-
- //-----delay--------------------------------------------------------------------
- always @(posedge sys_clk)
- begin
- value_in_d1 <= hd_gmii_data;
- value_in_d2 <= value_in_d1 ;
- value_in_d3 <= value_in_d2 ;
- value_in_d4 <= value_in_d3 ;
- value_in_d5 <= value_in_d4 ;
- value_in_d6 <= value_in_d5 ;
- value_in_d7 <= value_in_d6 ;
- value_in_d8 <= value_in_d7 ;
- value_in_d9 <= value_in_d8 ;
- value_in_d10 <= value_in_d9 ;
- value_in_d11 <= value_in_d10;
- value_in_d12 <= value_in_d11;
- value_in_d13 <= value_in_d12;
- value_in_d14 <= value_in_d13;
- value_in_d15 <= value_in_d14;
- value_in_d16 <= value_in_d15;
- value_in_d17 <= value_in_d16;
- value_in_d18 <= value_in_d17;
- value_in_d19 <= value_in_d18;
- value_in_d20 <= value_in_d19;
- value_in_d21 <= value_in_d20;
- value_in_d22 <= value_in_d21;
- value_in_d23 <= value_in_d22;
- value_in_d24 <= value_in_d23;
- value_in_d25 <= value_in_d24;
- value_in_d26 <= value_in_d25;
- value_in_d27 <= value_in_d26;
- value_in_d28 <= value_in_d27;
- value_in_d29 <= value_in_d28;
- value_in_d30 <= value_in_d29;
- value_in_d31 <= value_in_d30;
- value_in_d32 <= value_in_d31;
- value_in_d33 <= value_in_d32;
- value_in_d34 <= value_in_d33;
- value_in_d35 <= value_in_d34;
- end
- always @(posedge sys_clk)
- begin
- value_in_en_d1 <= hd_gmii_dv ;
- value_in_en_d2 <= value_in_en_d1 ;
- value_in_en_d3 <= value_in_en_d2 ;
- value_in_en_d4 <= value_in_en_d3 ;
- value_in_en_d5 <= value_in_en_d4 ;
- value_in_en_d6 <= value_in_en_d5 ;
- value_in_en_d7 <= value_in_en_d6 ;
- value_in_en_d8 <= value_in_en_d7 ;
- value_in_en_d9 <= value_in_en_d8 ;
- value_in_en_d10 <= value_in_en_d9 ;
- value_in_en_d11 <= value_in_en_d10;
- value_in_en_d12 <= value_in_en_d11;
- value_in_en_d13 <= value_in_en_d12;
- value_in_en_d14 <= value_in_en_d13;
- value_in_en_d15 <= value_in_en_d14;
- value_in_en_d16 <= value_in_en_d15;
- value_in_en_d17 <= value_in_en_d16;
- value_in_en_d18 <= value_in_en_d17;
- value_in_en_d19 <= value_in_en_d18;
- value_in_en_d20 <= value_in_en_d19;
- value_in_en_d21 <= value_in_en_d20;
- value_in_en_d22 <= value_in_en_d21;
- value_in_en_d23 <= value_in_en_d22;
- value_in_en_d24 <= value_in_en_d23;
- value_in_en_d25 <= value_in_en_d24;
- value_in_en_d26 <= value_in_en_d25;
- value_in_en_d27 <= value_in_en_d26;
- value_in_en_d28 <= value_in_en_d27;
- value_in_en_d29 <= value_in_en_d28;
- value_in_en_d30 <= value_in_en_d29;
- value_in_en_d31 <= value_in_en_d30;
- value_in_en_d32 <= value_in_en_d31;
- value_in_en_d33 <= value_in_en_d32;
- value_in_en_d34 <= value_in_en_d33;
- value_in_en_d35 <= value_in_en_d34;
- end
-
- always @(posedge sys_clk)
- begin
- value_in_sop_d1 <= hd_gmii_sop ;
- value_in_sop_d2 <= value_in_sop_d1 ;
- value_in_sop_d3 <= value_in_sop_d2 ;
- value_in_sop_d4 <= value_in_sop_d3 ;
- value_in_sop_d5 <= value_in_sop_d4 ;
- value_in_sop_d6 <= value_in_sop_d5 ;
- value_in_sop_d7 <= value_in_sop_d6 ;
- value_in_sop_d8 <= value_in_sop_d7 ;
- value_in_sop_d9 <= value_in_sop_d8 ;
- value_in_sop_d10 <= value_in_sop_d9 ;
- value_in_sop_d11 <= value_in_sop_d10;
- value_in_sop_d12 <= value_in_sop_d11;
- value_in_sop_d13 <= value_in_sop_d12;
- value_in_sop_d14 <= value_in_sop_d13;
- value_in_sop_d15 <= value_in_sop_d14;
- value_in_sop_d16 <= value_in_sop_d15;
- value_in_sop_d17 <= value_in_sop_d16;
- value_in_sop_d18 <= value_in_sop_d17;
- value_in_sop_d19 <= value_in_sop_d18;
- value_in_sop_d20 <= value_in_sop_d19;
- value_in_sop_d21 <= value_in_sop_d20;
- value_in_sop_d22 <= value_in_sop_d21;
- value_in_sop_d23 <= value_in_sop_d22;
- value_in_sop_d24 <= value_in_sop_d23;
- value_in_sop_d25 <= value_in_sop_d24;
- value_in_sop_d26 <= value_in_sop_d25;
- value_in_sop_d27 <= value_in_sop_d26;
- value_in_sop_d28 <= value_in_sop_d27;
- value_in_sop_d29 <= value_in_sop_d28;
- value_in_sop_d30 <= value_in_sop_d29;
- value_in_sop_d31 <= value_in_sop_d30;
- value_in_sop_d32 <= value_in_sop_d31;
- value_in_sop_d33 <= value_in_sop_d32;
- value_in_sop_d34 <= value_in_sop_d33;
- value_in_sop_d35 <= value_in_sop_d34;
- end
- always @(posedge sys_clk)
- begin
- value_in_eop_d1 <= hd_gmii_eop ;
- value_in_eop_d2 <= value_in_eop_d1 ;
- value_in_eop_d3 <= value_in_eop_d2 ;
- value_in_eop_d4 <= value_in_eop_d3 ;
- value_in_eop_d5 <= value_in_eop_d4 ;
- value_in_eop_d6 <= value_in_eop_d5 ;
- value_in_eop_d7 <= value_in_eop_d6 ;
- value_in_eop_d8 <= value_in_eop_d7 ;
- value_in_eop_d9 <= value_in_eop_d8 ;
- value_in_eop_d10 <= value_in_eop_d9 ;
- value_in_eop_d11 <= value_in_eop_d10;
- value_in_eop_d12 <= value_in_eop_d11;
- value_in_eop_d13 <= value_in_eop_d12;
- value_in_eop_d14 <= value_in_eop_d13;
- value_in_eop_d15 <= value_in_eop_d14;
- value_in_eop_d16 <= value_in_eop_d15;
- value_in_eop_d17 <= value_in_eop_d16;
- value_in_eop_d18 <= value_in_eop_d17;
- value_in_eop_d19 <= value_in_eop_d18;
- value_in_eop_d20 <= value_in_eop_d19;
- value_in_eop_d21 <= value_in_eop_d20;
- value_in_eop_d22 <= value_in_eop_d21;
- value_in_eop_d23 <= value_in_eop_d22;
- value_in_eop_d24 <= value_in_eop_d23;
- value_in_eop_d25 <= value_in_eop_d24;
- value_in_eop_d26 <= value_in_eop_d25;
- value_in_eop_d27 <= value_in_eop_d26;
- value_in_eop_d28 <= value_in_eop_d27;
- value_in_eop_d29 <= value_in_eop_d28;
- value_in_eop_d30 <= value_in_eop_d29;
- value_in_eop_d31 <= value_in_eop_d30;
- value_in_eop_d32 <= value_in_eop_d31;
- value_in_eop_d33 <= value_in_eop_d32;
- value_in_eop_d34 <= value_in_eop_d33;
- value_in_eop_d35 <= value_in_eop_d34;
- end
- endmodule