- cluster_top
- (
- input Clk,
- input Rst,
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- input [15 : 0] BinaryImageWidth,
- input [15 : 0] BinaryImageHeight,
- input [15 : 0] RoiStartRow,//start from 0
- input [15 : 0] RoiEndRow,//start from 0
- input [15 : 0] RoiStartCol,//start from 0, must > 0, to insure StartpPos - 1'b1 >= 0
- input [15 : 0] RoiEndCol,//start from 0
- input [15 : 0] ClusterDistance,
- input DataModify,
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- //for saving time, the upper layer can get the next line ready, which will be used next time.
- input ClusterStart,
- output LineDataFetch,
- input LineDataRdy,
- output [15 : 0] LinePos, //the line position in the image, which is to be read from ddr by upper layer.
- output [15 : 0] LineRdAddr, //upper layer only read [RoiStartRow,RoiEndRow], this layer only read [RoiStartCol,RoiEndCol]
- input [7 : 0] LineRddata,
- output LineDone,//line done
- input [8 : 0] LineWrAddr,//wait until the upper layer read this blockram line data.
- output [127 : 0] LineWrData,//data is valid for one clock period delay to LineWrAddr.
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- //1) read RAM data to modify, and write modified data to outer RAM, both use the same RAM.
- //2) DmLineRdAddr and DmLineWrAddr will deal with the data [RoiStartCol,RoiEndCol]
- //3) DmLineRdAddr/DmLineRddata/DmLineWrEn/DmLineWrAddr/DmLineWrData are operate the RAM.
- //4) RAM data : 8'hff is the default value, others are the real class.
- output DmLineDataFetch,
- input DmLineDataRdy,
- output [15 : 0] DmLinePos,//the line position in the image, which is to be read from ddr by upper layer.
- output [9 : 0] DmLineRdAddr,//8192 bytes/16 = 512, so 10 bit width is enough.
- input [127 : 0] DmLineRddata,
- output DmLineWrEn,
- output [9 : 0] DmLineWrAddr,//modify result write into outer RAM address.
- output [127 : 0] DmLineWrData,
- output DmLineDone,//modify line data done, the upper layer use this signal to write line data into ddr.
- output DmDone,
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- output ClusterFinish,//all line finish
- output [15 : 0] ClusterNum,
- input [15 : 0] ClusterRamAddr,
- output [111 : 0] ClusterDoutb
效果方面,举个简单的图案把: