module miaobiao_tb;
reg SYSCLK;
reg RST;
wire LED_DATA;
wire LED_SEL;
wire OUT;
miaobiao i_miaobiao
(
.SYSCLK (SYSCLK) ,
.RST (RST) ,
.LED_DATA (LED_DATA),
.LED_SEL (LED_SEL)
);
DIV I_DIV
(
.SYSCLK (SYSCLK),
.RST (RST) ,
.OUT (OUT)
);
always #10 SYSCLK= ~SYSCLK;
initial
begin
#0 SYSCLK =0;
RST =0;
#100 RST =1;
end
我不知道两个模块在testbench中该怎写
仿真时DIV这个模块的数据都是红色的 |
楼主
