LM3S6965其仅需以下步骤即可轻松实现Ethernet功能,比RTL8029/8039,NE2000之类的芯片方便多了.
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To use the Ethernet Controller, the peripheral must be enabled by setting the ETH bits in the RCGC2 register. The following steps can then be used to configure the ethernet controller for basic operation.
1. Program the MACDIV register to obtain a 2.5 MHz clock (or less) on the internal MII. Assuming a 20 MHz system clock, the MACDIV value would be 4.
2. Program the MACIA0 and MACIA1 register for address filtering.
3. Program the MACTCTL register for Auto CRC generation, padding, and full duplex operation using a value of 0x16.
4. Program the MACRCTL register to reject frames with bad FCS using a value of 0x08.
5. Enable both the Transmitter and Receive by setting the LSB in both the MACTCTL and MACRCTL register.
6. To transmit a frame, write the frame into the TX FIFO using the MACDATA register. Then set the NEWTX bit in the MACTR register to initiate the transmit process. When the NEWTX bit has been cleared, the TX FIFO will be available for the next transmit frame.
7. To receive a frame, wait for the NPR field in the MACNP register to be non-zero. Then begin reading the frame from the RX FIFO by using the MACDATA register. When the frame (including the FCS field) has been read, the NPR field should decrement by one. When there are no more frames in the RX FIFO, the NPR field will read 0.
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