使用周立公初始化为自适应100Ｍ经常丢包，连接不稳定，看网上说强制10Ｍ比较稳定，请问一下，初始化需要如何设置成强制10Ｍ？ 原来的初始化
void InitNic(INT8U num)
{
static INT8U bINT = 0;
INT32U i;
PCONP |= 0X40000000;
/* Set the PIN to RMII */
// PINSEL2 &= 0x0fc0ccf0;
//PINSEL2 |= 0X50151105; //PINSEL2 = 0x50151105; /* selects P1[0,1,4,8,9,10,14,15] */
//PINSEL3 &= 0xfffffff0;
//PINSEL3 |= 0X00000005; //PINSEL3 = 0x00000005; /* selects P1[17:16] */
//i = rMAC_MODULEID;
//if(i == OLD_EMAC_MODULE_ID)
// PINSEL2 = 0x50151105; /* selects P1[0,1,4,8,9,10,14,15] */
//else
// PINSEL2 = 0x50150105;
//PINSEL3 = 0x00000005; /* selects P1[17:16] */
//old
PINSEL2 |= (1)|(1<<2)|(1<<8)|(1<<16)|(1<<18)|(1<<20)|(1<<28)|(1<<30); /* selects P1[0,1,4,8,9,10,14,15] */
//new
//PINSEL2 = 0x50150105;
PINSEL3 |= 0x00000005; /* selects P1[17:16] */
/* reset : soft,simulation,mcs/rx,rx,mcs/tx,tx */
MAC_MAC1 = 0xCF00; /* [15],[14],[11:8] -> soft resets all MAC internal modules */
/* RegReset,TxReset,RxReset */
MAC_COMMAND = 0x0038; /* reset all datapaths and host registers */
OSTimeDly(20);
//for ( i = 0; i < 0x64; i++ ); /* short delay after reset */
MAC_MAC1 = 0x0; /* deassert all of the above soft resets in MAC1 */
EMAC_TxDisable();
EMAC_RxDisable();
MAC_MAC2 = 0x00; /* initialize MAC2 register to default value */
/* Non back to back inter-packet gap */
MAC_IPGR = 0x0012; /* use the default value recommended in the users manual */
MAC_CLRT = 0x370F; /* Use the default value in the users manual */
MAC_MAXF = 0x0600; /* Use the default value in the users manual */
/* PHY Select RMII */
///rECOMMAND |= (1<<9);
/* Initial MII Mgmt */
// rMCFG |= (7<<2) + 1; //clk div 28,address increment
//MAC_MCFG = 0x801d;
//MAC_MCFG |= 0x0019; /* host clock divided by 20, no suppress preamble, no scan increment */
MAC_MCFG |= 0x0018;
/* RMII configuration */
//MAC_COMMAND |= 0x0200;
MAC_COMMAND = 0x0240;
//MAC_SUPP = 0x0900; /* hxm RMII setting, PHY support: [8]=0 ->10 Mbps mode, =1 -> 100 Mbps mode */
/* (note bit 4 was set in original test, although spec says its unused) */
//for ( i = 0; i < 0x64; i++ ); /* short delay */
OSTimeDly(20);
//MAC_SUPP = 0x0100;
MAC_SUPP = 0x0000;
// probe phy address
for(i=0;i<32;i++)
{
PHYID = Read_PHY(i , 2 );
if(PHYID == 0X0181)
break;
OSTimeDly(1);
}
if(i >= 32){
OSTimeDly(OS_TICKS_PER_SEC*3);
return;
}
PHYID = i;
/// PHY RESET
Write_PHY(PHYID, 0, 0x9200 );
//Write_PHY( 0, 0x0000 );
//old 2012-09-18 wsht
OSTimeDly(OS_TICKS_PER_SEC * 16);
for(i=0;i<32;i++)
PHYREG[i] = Read_PHY(PHYID ,i );
tempreg = Read_PHY(PHYID, 17 );
/* INPUT MAC ADDRESS */
SetMacID(NetPort[num].My_Mac);
if(tempreg & 0x8000)//100fdx
{
dulxp = 1;
speed = 100; //100
MAC_MAC2 = 0x31; /* half duplex, CRC and PAD enabled. */
MAC_SUPP |= 0x0100;//0x0100 /* RMII Support Reg. speed is set to 100M */
MAC_COMMAND |= 0x0640;
/* back to back int-packet gap */
MAC_IPGT = 0x0015; /* IPG setting in half duplex mode */
}
else if(tempreg & 0x4000)//100hdx
{
dulxp = 0;
speed = 100; //100
MAC_MAC2 = 0x30; /* full duplex, CRC and PAD enabled. */
MAC_SUPP |= 0x0100; //0x0100 /* RMII Support Reg. speed is set to 100M */
MAC_COMMAND |= 0x0240;
/* back to back int-packet gap */
MAC_IPGT = 0x0012; /* IPG setting in full duplex mode */
}
else if(tempreg & 0x2000)//10fdx
{
dulxp = 1;
speed = 10;
MAC_MAC2 = 0x31; /* full duplex, CRC and PAD enabled. */
MAC_SUPP = 0; /* RMII Support Reg. speed is set to 10M */
MAC_COMMAND |= 0x0640;
/* back to back int-packet gap */
MAC_IPGT = 0x0015; /* IPG setting in full duplex mode */
}
else if(tempreg & 0x1000)//10hdx
{
dulxp = 0;
speed = 10;
MAC_MAC2 = 0x30; /* half duplex, CRC and PAD enabled. */
MAC_SUPP = 0; /* RMII Support Reg. speed is set to 10M */
MAC_COMMAND |= 0x0240;
/* back to back int-packet gap */
MAC_IPGT = 0x0012; /* IPG setting in half duplex mode */
}
EMACTxDescriptorInit();
EMACRxDescriptorInit();
MAC_MAC1 |= 0x0002; /* [1]-Pass All Rx Frame */
/* Set up RX filter, accept broadcast and perfect station */
MAC_RXFILTERCTRL = 0x0022; /* [1]-accept broadcast, [5]accept perfect */
MAC_RXFILTERCTRL |= 0x0005;//MULTICAST_UNICAST
MAC_RXFILTERCTRL |= 0x0018;//ENABLE_HASH
/* MAC interrupt related register setting */
//if ( install_irq( EMAC_INT, (void *)EMACHandler, HIGHEST_PRIORITY ) == FALSE )
//{
// return (FALSE);
//}
//MAC_INTENABLE = 0x00FF; /* Enable all interrupts except SOFTINT and WOL */
EMAC_RxEnable();
EMAC_TxEnable();
LINKSTATUS = 1;
MAC_INTENABLE = 0x000c; /* Enable all interrupts except SOFTINT and WOL */
MAC_INTCLEAR = 0xFF; /* clear all MAC interrupts */
EINTSTA = 0;
if (bINT == 0){
zyIsrSet (NVIC_ETHR, (unsigned long)Ethernet_Exception, PRIO_FOUR);
bINT = 1;
}
// MAC_INTENABLE = 0x000c; /* Enable all interrupts except SOFTINT and WOL */
}
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