请教各位同学: uart5初始化代码如下: // Enable USART2, USART3, USART4, USART5 clocks RCC_APB1PeriphClockCmd (RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4 | RCC_APB1Periph_UART5, ENABLE);
// Configure UART5 Tx (PC.12) as alternate function push-pull GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init (GPIOC, &GPIO_InitStructure); // Configure UART5 Rx (PD.02) as input floating GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init (GPIOD, &GPIO_InitStructure); // Configure UART5 mode USART_Init (UART5, &USART_InitStructure); USART_ClockInit (UART5, &USART_ClockInitStruct); // Enable the UART5 USART_Cmd (UART5, ENABLE);
目前在uart5串口上输出数据不正确,即输出后测量pin80没有波形。 usart1~usart3和uart4测试正常,初始化代码是类似的。
另,STM32f101VC的低16位地址是和数据线复用的,目前读写控制线波形正常,高8位地址输出正常,但NADV信号一直维持高电平不变,是否下面的代码有错: // Enable DMA and FSMC clocks RCC_AHBPeriphClockCmd (RCC_AHBPeriph_DMA1 | RCC_AHBPeriph_DMA2 | RCC_AHBPeriph_FSMC, ENABLE);
// NADV configuration GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7; // NADV GPIO_Init (GPIOB, &GPIO_InitStructure);
//-- FSMC 时序配置 ------------------------------------------------------ FSMC_ReadWriteTimingStruct.FSMC_AddressSetupTime = 15; FSMC_ReadWriteTimingStruct.FSMC_AddressHoldTime = 15; FSMC_ReadWriteTimingStruct.FSMC_DataSetupTime = 15; FSMC_ReadWriteTimingStruct.FSMC_BusTurnAroundDuration = 15; FSMC_ReadWriteTimingStruct.FSMC_CLKDivision = 15; FSMC_ReadWriteTimingStruct.FSMC_DataLatency = 15; FSMC_ReadWriteTimingStruct.FSMC_AccessMode = FSMC_AccessMode_B;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Enable; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; FSMC_NORSRAMInitStructure.FSMC_AsyncWait = FSMC_AsyncWait_Disable; FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &FSMC_ReadWriteTimingStruct; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &FSMC_ReadWriteTimingStruct;
FSMC_NORSRAMInit (&FSMC_NORSRAMInitStructure);
// Enable FSMC Bank1_SRAM Bank FSMC_NORSRAMCmd (FSMC_Bank1_NORSRAM1, ENABLE);
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