多看代码吧。<br /><br /> always @(posedge clk or posedge reset)<br /> begin<br /> if(reset==0)<br /> begin <br /> n1 <= 1;<br /> n2 <= 1;<br /> end<br /> <br /> else <br /> begin<br /> n1 <= 被检测信号;<br /> n2 <= n1;<br /> end<br /> end<br /><br />在检测下降沿模块中<br />if(!n1 && n2)
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