最近写了一个光电编码器的接口程序，仿真正常，但是下载到器件中运行就有问题，器件是用的max V的5m240，时钟是用的5MHZ内部时钟，结果用示波器在输出管脚上量到了120Mhz的震荡波形，持续几个毫秒之后变成了高电平。具体代码如下，有没有哪位大神可以帮忙看一下问题在哪？
--*****************************************************
-- Filename :
-- Author :
-- Description :
-- Callde by :
-- Revision : R1.0
-- Date :
--*****************************************************
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all ;
use IEEE.std_logic_unsigned.all ;
entity encoder is
port (
--------------ROTARY INPUT --------------
PI_A : in std_logic;
PI_B : in std_logic;
RESET : in std_logic;
CLK : in std_logic;
--------------SWITCH CONTROL--------------
PO_CW : out std_logic :='0'; --CW FOR CLOCKWISE;
PO_NCW : out std_logic :='0' --nCW FOR ANTICLOCKWISE;
);
end encoder;
architecture behav of encoder is
--------------SIGNAL DEFINE--------------
type state_type is (s00,s01,s10,s11);
signal PR_STATE, NT_STATE :state_type;
signal CW,NCW :std_logic;
signal CLK_CNT1 : std_logic_vector(15 downto 0) :="0000000000000001";
signal CLK_CNT2 : std_logic_vector(15 downto 0) :="0000000000000001";
begin
process(CLK,RESET)
begin
if(RESET = '1') then
PR_STATE <= s00;
else
if(CLK'event and CLK='1') then
PR_STATE <= NT_STATE;
end if;
end if;
end process;
process(PI_A,PI_B,PR_STATE)
begin
CW <= '0';
NCW <= '0';
case PR_STATE is
when s00 =>
if(PI_A='1' and PI_B='0') then
NT_STATE <= s10;
CW <='1';
elsif(PI_A='0' and PI_B='1') then
NT_STATE <= s01;
NCW <= '1';
else
NT_STATE <= s00;
CW <= '0';
NCW <= '0';
end if;
when s10 =>
if(PI_A='0' and PI_B='0') then
NT_STATE <= s00;
NCW <='1';
elsif(PI_A='1' and PI_B='1') then
NT_STATE <= s11;
CW <= '1';
else
NT_STATE <= s10;
CW <= '0';
NCW <= '0';
end if;
when s11 =>
if(PI_A='1' and PI_B='0') then
NT_STATE <= s10;
NCW <='1';
elsif(PI_A='0' and PI_B='1') then
NT_STATE <= s01;
CW <= '1';
else
NT_STATE <= s11;
CW <= '0';
NCW <= '0';
end if;
when s01 =>
if(PI_A='0' and PI_B='0') then
NT_STATE <= s00;
CW <='1';
elsif(PI_A='1' and PI_B='1') then
NT_STATE <= s11;
NCW <= '1';
else
NT_STATE <= s01;
CW <= '0';
NCW <= '0';
end if;
end case;
end process;
process(CLK,CW,NCW)
begin
if (CLK'event and CLK ='1') then
if (CLK_CNT1 = "1111111111111111") then
CLK_CNT1 <= (others => '0');
PO_CW <= '0';
else
CLK_CNT1 <= CLK_CNT1+1;
end if;
end if;
if ( CW = '1') then
CLK_CNT1 <= "0000000000000000";
PO_CW <= '1';
end if;
if (CLK'event and CLK ='1') then
if (CLK_CNT2 = "1111111111111111") then
CLK_CNT2 <= (others => '0');
PO_NCW <= '0';
else
CLK_CNT2 <= CLK_CNT2+1;
end if;
end if;
if (NCW = '1') then
CLK_CNT2 <= "0000000000000000";
PO_NCW <= '1';
end if;
end process;
end behav; |
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