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<br />mcbsp中断rint 和xint中断进不去？？谢谢<br />#include <stdio.h><br />#include <csl.h><br />#include <csl_mcbsp.h><br />#include <DEC6713.h><br />extern far void vectors();<br />//---------Global constants---------<br />#define N 10<br /><br /><br />/* create a config structure for digital loopback mode */<br />static MCBSP_Config ConfigLoopback = {<br /> <br /> /* Serial Port Control Register (SPCR) */<br /> MCBSP_SPCR_RMK( <br /> <br /> MCBSP_SPCR_FREE_YES, <br /> <br /> MCBSP_SPCR_SOFT_YES, <br /> MCBSP_SPCR_FRST_YES, <br /> MCBSP_SPCR_GRST_YES, <br /> <br /> MCBSP_SPCR_XINTM_XRDY , <br /> MCBSP_SPCR_XSYNCERR_NO , <br /> MCBSP_SPCR_XRST_NO, <br /> MCBSP_SPCR_DLB_ON, <br /> MCBSP_SPCR_RJUST_RZF,<br /> <br /> MCBSP_SPCR_CLKSTP_DISABLE,<br /> <br /> MCBSP_SPCR_DXENA_OFF,<br /> <br /> MCBSP_SPCR_RINTM_RRDY,<br /> <br /> MCBSP_SPCR_RSYNCERR_NO,<br /> <br /> MCBSP_SPCR_RRST_NO <br /> <br /> ),<br /> <br /> /* Receive Control Register (RCR) */<br /> MCBSP_RCR_RMK( <br /> <br /> MCBSP_RCR_RPHASE_SINGLE, <br /> MCBSP_RCR_RFRLEN2_OF(0), <br /> MCBSP_RCR_RWDLEN2_8BIT,<br /> MCBSP_RCR_RCOMPAND_MSB,<br /> <br /> MCBSP_RCR_RFIG_YES, <br /> <br /> MCBSP_RCR_RDATDLY_0BIT,<br /> <br /> MCBSP_RCR_RFRLEN1_OF(0), <br /> <br /> MCBSP_RCR_RWDLEN1_32BIT,<br /> <br /> MCBSP_RCR_RWDREVRS_DISABLE<br /> ),<br /><br /> /* Transmit Control Register (XCR) */<br /> MCBSP_XCR_RMK( <br /> <br /> MCBSP_XCR_XPHASE_SINGLE,<br /> <br /> MCBSP_XCR_XFRLEN2_OF(0),<br /> <br /> MCBSP_XCR_XWDLEN2_8BIT, <br /> <br /> MCBSP_XCR_XCOMPAND_MSB, <br /> <br /> MCBSP_XCR_XFIG_YES, <br /> MCBSP_XCR_XDATDLY_0BIT, <br /> <br /> MCBSP_XCR_XFRLEN1_OF(0), <br /><br /> MCBSP_XCR_XWDLEN1_32BIT, <br /><br /> MCBSP_XCR_XWDREVRS_DISABLE <br /> <br /> ),<br /> <br /> /*serial port sample rate generator register(SRGR) */<br /> MCBSP_SRGR_RMK( <br /> <br /> MCBSP_SRGR_GSYNC_FREE,<br /> <br /> MCBSP_SRGR_CLKSP_RISING,<br /> MCBSP_SRGR_CLKSM_INTERNAL,<br /> MCBSP_SRGR_FSGM_DXR2XSR,<br /> <br /> MCBSP_SRGR_FPER_OF(63),<br /> ),<br /> <br /> MCBSP_MCR_DEFAULT, /* Using default value of MCR register */<br /> MCBSP_RCER_DEFAULT,/* Using default value of RCER register */<br /> MCBSP_XCER_DEFAULT,/* Using default value of XCER register */<br /> <br /> /* serial port pin control register(PCR) */<br /> MCBSP_PCR_RMK( <br /> <br /> MCBSP_PCR_XIOEN_SP, /* Transmitter in general-purpose I/O mode - only when <br /> XRST = 0 in SPCR - (XIOEN)<br /> MCBSP_PCR_XIOEN_SP - CLKS pin is not a general <br /> purpose input. DX pin is not a general purpose<br /> output.FSX and CLKX are not general-purpose I/Os.<br /> MCBSP_PCR_XIOEN_GPIO - CLKS pin is a general-purpose<br /> input. DX pin is a general-purpose output. <br /> FSX and CLKX are general-purpose I/Os. These<br /> serial port pins do not perform serial port<br /> operation. */<br /> MCBSP_PCR_RIOEN_SP, /* Receiver in general-purpose I/O mode - only when <br /> RRST = 0 in SPCR -(RIOEN)<br /> MCBSP_PCR_RIOEN_SP - DR and CLKS pins are not <br /> general-purpose inputs. FSR and CLKR are not <br /> general-purpose I/Os and perform serial port <br /> operation.<br /> MCBSP_PCR_RIOEN_GPIO - DR and CLKS pins are <br /> general-purpose inputs. FSR and CLKR are <br /> general-purpose I/Os. These serial port pins do<br /> not perform serial port operation. */ <br /> MCBSP_PCR_FSXM_INTERNAL, /* Transmit frame synchronization mode(FSXM)<br /> MCBSP_PCR_FSXM_EXTERNAL - Frame synchronization <br /> signal is provided by an external source. FSX<br /> is an input pin. <br /> MCBSP_PCR_FSXM_INTERNAL - Frame synchronization <br /> generation is determined by the sample rate <br /> generator frame synchronization mode bit FSGM<br /> in the SRGR. */<br /> <br /> MCBSP_PCR_FSRM_EXTERNAL, /* Receive frame synchronization mode (FSRM)<br /> MCBSP_PCR_FSRM_EXTERNAL - Frame synchronization <br /> signals are generated by an external device.<br /> FSR is an input pin. <br /> MCBSP_PCR_FSRM_INTERNAL - Frame synchronization <br /> signals are generated internally by the sample<br /> rate generator. FSR is an output pin except <br /> when GSYNC = 1 in SRGR. */ <br /> <br /> MCBSP_PCR_CLKXM_OUTPUT, /* Transmitter clock mode (CLKXM)<br /> MCBSP_PCR_CLKXM_INPUT - Transmitter clock is <br /> driven by an external clock with CLKX as an<br /> input pin.<br /> MCBSP_PCR_CLKXM_OUTPUT - CLKX is an output pin<br /> and is driven by the internal sample rate<br /> generator.<br /> <br /> During SPI mode :<br /> MCBSP_PCR_CLKXM_INPUT - McBSP is a slave and <br /> (CLKX) is driven by the SPI master in the <br /> system. CLKR is internally driven by CLKX.<br /> MCBSP_PCR_CLKXM_OUTPUT - McBSP is a master and <br /> generates the transmitter clock (CLKX) to<br /> drive its receiver clock (CLKR) and the shift<br /> clock of the SPI-compliant slaves in the <br /> system. */ <br /> MCBSP_PCR_CLKRM_INPUT, /* Receiver clock mode (CLKRM)<br /> <br /> Case 1: Digital loopback mode not set in SPCR<br /> <br /> MCBSP_PCR_CLKRM_INPUT - Receive clock (CLKR) is <br /> an input driven by an external clock.<br /> <br /> MCBSP_PCR_CLKRM_OUTPUT - CLKR is an output pin <br /> and is driven by the sample rate generator.<br /> <br /> Case 2: Digital loopback mode set in SPCR<br /> <br /> MCBSP_PCR_CLKRM_INPUT - Receive clock is driven<br /> by the transmit clock (CLKX), which is based<br /> on the CLKXM bit in PCR. CLKR is in high <br /> impedance.<br /> MCBSP_PCR_CLKRM_INPUT - CLKR is an output pin and<br /> is driven by the transmit clock. The transmit<br /> clock is derived from CLKXM bit in the PCR.*/<br /> <br /> <br /> MCBSP_PCR_CLKSSTAT_0, /* CLKS pin status(CLKSSTAT)<br /> MCBSP_PCR_CLKSSTAT_0 <br /> MCBSP_PCR_CLKSSTAT_1 */<br /> <br /> MCBSP_PCR_DXSTAT_0, /* DX pin status(DXSTAT)<br /> MCBSP_PCR_DXSTAT_0<br /> MCBSP_PCR_DXSTAT_1 */<br /> <br /> MCBSP_PCR_FSXP_ACTIVEHIGH, /* Transmit frame synchronization polarity(FSXP)<br /> MCBSP_PCR_FSXP_ACTIVEHIGH - Frame synchronization<br /> pulse FSX is active high<br /> MCBSP_PCR_FSXP_ACTIVELOW - Frame synchronization<br /> pulse FSX is active low */<br /> MCBSP_PCR_FSRP_ACTIVEHIGH, /* Receive frame synchronization polarity(FSRP)<br /> MCBSP_PCR_FSRP_ACTIVEHIGH - Frame synchronization<br /> pulse FSR is active high<br /> MCBSP_PCR_FSRP_ACTIVELOW - Frame synchronization <br /> pulse FSR is active low */<br /> MCBSP_PCR_CLKXP_RISING, /* Transmit clock polarity(CLKXP)<br /> MCBSP_PCR_CLKXP_RISING - Transmit data driven on <br /> rising edge of CLKX<br /> MCBSP_PCR_CLKXP_FALLING - Transmit data driven on<br /> falling edge of CLKX */<br /> MCBSP_PCR_CLKRP_FALLING /* Receive clock polarity(CLKRP)<br /> MCBSP_PCR_CLKRP_FALLING - Receive data sampled on<br /> falling edge of CLKR<br /> MCBSP_PCR_CLKRP_RISING - Receive data sampled on<br /> rising edge of CLKR */<br /> )<br />}; <br /><br />static Uint32 rcvEventId, xmtEventId;<br />//Uint16 rcvEventID, xmtEventID;<br />Uint32 xmt[N],rcv[N];<br />volatile Uint16 XfrCnt = 0;<br />Uint16 err = 0;<br />Uint16 old_intm;<br />MCBSP_Handle hMcbsp; <br />Uint16 i;<br /><br /><br />void taskFxn(void);<br />/* ---------------------------------------------------------------------------*/ <br />//---------main routine--------- <br />void main(void)<br />{<br /> Uint16 i;<br /><br /> /* Initialize CSL library - This is REQUIRED !!! */<br /> CSL_init();<br /> <br /> /* Set IVPD/IVPH to start of interrupt vector location */<br />// IRQ_setVecs((Uint32)(&VECSTART));<br /><br /> for (i = 0; i <= N - 1; i++) { <br /> xmt = i;<br /> rcv = 0;<br /> }<br /><br /> /* Call function to effect transfer */<br /> taskFxn();<br />}<br /><br /><br />void taskFxn(void)<br />{<br /> Uint16 i;<br /><br /> old_intm = IRQ_globalDisable();<br /> <br /><br /> /* Let's open up serial port 1 */<br /> hMcbsp = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET);<br /> <br /><br /> /* Get EventId's associated with MCBSP Port 0 receive and transmit */<br /> /* The event Id's are used to communicate with the CSL interrupt */<br /> /* module functions. */<br /> rcvEventId = MCBSP_getRcvEventId(hMcbsp);<br /> xmtEventId = MCBSP_getXmtEventId(hMcbsp);<br /> IRQ_setVecs(vectors); /* point to the IRQ vector table */<br /><br /> /* Clear any pending receive or transmit interrupts */<br /> IRQ_clear(rcvEventId); <br /> IRQ_clear(xmtEventId);<br /> <br /> /* Place address of interrupt service routines at */<br /> /* associated vector location */<br /> //IRQ_plug(rcvEventId, &readIsr); <br /> //IRQ_plug(xmtEventId, &writeIsr);<br /> <br /> /* Map timer events to physical interrupt number */ <br /> IRQ_map(rcvEventId, 14);<br /><br /> IRQ_map(xmtEventId, 15);<br /><br /><br /> /* We'll set it up for digital loopback, 32bit mode. We have */<br /> /* to setup the sample rate generator to allow self clocking. */<br /> MCBSP_config(hMcbsp,&ConfigLoopback);<br /><br /> /* Enable the MCBSP receive and transmit interrupts */<br /> IRQ_enable(rcvEventId); <br /> IRQ_enable(xmtEventId);<br /><br /> /* Now that the port is setup, let's enable it in steps. */<br /> MCBSP_start(hMcbsp,MCBSP_RCV_START | MCBSP_XMIT_START |<br /> MCBSP_SRGR_START| MCBSP_SRGR_FRAMESYNC,<br /> MCBSP_SRGR_DEFAULT_DELAY);<br /><br /> <br /> /* Prime MCBSP transmit */<br /> while(!MCBSP_xrdy(hMcbsp)){<br /> ;<br /> }<br /> MCBSP_write(hMcbsp,xmt[3]);<br /> <br />// while(!MCBSP_rrdy(hMcbsp)){ ; }<br /><br />// x = MCBSP_read(hMcbsp);XfrCnt<br /><br /><br /> /* Enable all masked interrupts */<br /> IRQ_globalEnable();<br /><br /> /* Wait for transfer of data */<br /> while (XfrCnt < 10) {<br /> ;<br /> }<br /> <br /> /*------------------------------------------*\<br /> * Compare values <br /> \*------------------------------------------*/ <br /> for(i = 0; i <= N - 1; i++){<br /> if (rcv != xmt){<br /> ++err;<br /> break;<br /> }<br /> }<br /><br /> printf ("%s\n",err?"TEST FAILED" : "TEST PASSED");<br /><br /> /* Restore old value of INTM */<br /> IRQ_globalRestore(old_intm);<br /> <br /> /* We're done with MCBSP, so close it */<br /> MCBSP_close(hMcbsp); <br />}<br /><br /><br /><br />/************************************************************************\<br />name: Interrupt Service Routine c_int14<br /><br />purpose: ISR to service TIMERINT1.<br /> vecs.asm must be modified to include<br /> c_int14 entry.<br /> <br />inputs: n/a<br /><br />returns: n/a<br />\************************************************************************/<br /><br />interrupt void c_int15(void)<br />{<br /> /*<br /> * Disable this ISR's interrupt before the write to the McBSP<br /> * since another interrupt will be generated as soon as the write<br /> * completes, which happens very quickly due to the loopback to<br /> * the McBSP receive.<br /> */<br /> IRQ_disable(xmtEventId); <br /> MCBSP_write(hMcbsp,xmt[XfrCnt]);<br />}<br /><br />interrupt void c_int14(void)<br />{<br /><br /><br /> rcv[XfrCnt] = MCBSP_read32(hMcbsp);<br /> ++XfrCnt;<br /> <br /> if (XfrCnt == N) {<br /> IRQ_disable(rcvEventID);<br /> IRQ_disable(xmtEventID);<br /> MCBSP_reset(hMcbsp);<br /> } <br /> else {<br /> IRQ_enable(xmtEventID); <br /> }<br />}<br /><br /><br />/******************************************************************************\<br />* End of DEC6713_TIMER.c<br />\******************************************************************************/<br /> <br /><br />这个我编写的TI 合纵达6713 的 MCBSP中断测试程序， int_14为mcbsp中断读操作 int_15为中断写操作<br />程序最后停在while (XfrCnt < 10) {<br /> ;<br /> } 处；<br />就是不进中断； <br />中断标志位 MCBSP_rrdy(hMcbsp) MCBSP_xrdy(hMcbsp)<br /> 均改变了，就是进不去啊 <br /> <br /> 请大家帮忙看看 谢谢！！<br /><br /><br /><br /><br /><br /><br /><br /> |
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