编译通过,只是不知道有没有实现功能
Info: ******************************************************************* Info: Running Quartus II Analysis & Synthesis Info: Version 6.0 Build 178 04/27/2006 SJ Full Version Info: Processing started: Sat Apr 14 21:15:16 2007 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off fpdiv -c fpdiv Info: Found 2 design units, including 1 entities, in source file fpdiv.vhd Info: Found design unit 1: fpdiv-fpdiv_arch Info: Found entity 1: fpdiv Info: Elaborating entity "fpdiv" for the top level hierarchy Warning (10036): Verilog HDL or VHDL warning at fpdiv.vhd(28): object "R0" assigned a value but never read Warning (10036): Verilog HDL or VHDL warning at fpdiv.vhd(36): object "D3" assigned a value but never read Info: Found 1 design units, including 1 entities, in source file ../../../../altera6/quartus60/libraries/megafunctions/lpm_add_sub.tdf Info: Found entity 1: lpm_add_sub Info: Elaborated megafunction instantiation "lpm_add_sub:Add0" Info: Found 1 design units, including 1 entities, in source file ../../../../altera6/quartus60/libraries/megafunctions/addcore.tdf Info: Found entity 1: addcore Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|addcore:adder", which is child of megafunction instantiation "lpm_add_sub:Add0" Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter: Info: Parameter "LPM_WIDTH" = "7" Info: Parameter "LPM_DIRECTION" = "ADD" Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED" Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO" Info: Found 1 design units, including 1 entities, in source file ../../../../altera6/quartus60/libraries/megafunctions/a_csnbuffer.tdf Info: Found entity 1: a_csnbuffer Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "lpm_add_sub:Add0" Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter: Info: Parameter "LPM_WIDTH" = "7" Info: Parameter "LPM_DIRECTION" = "ADD" Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED" Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO" Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "lpm_add_sub:Add0" Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter: Info: Parameter "LPM_WIDTH" = "7" Info: Parameter "LPM_DIRECTION" = "ADD" Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED" Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO" Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|addcore:adder|addcore:adder[0]", which is child of megafunction instantiation "lpm_add_sub:Add0" Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter: Info: Parameter "LPM_WIDTH" = "7" Info: Parameter "LPM_DIRECTION" = "ADD" Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED" Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO" Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|addcore:adder|addcore:adder[0]|a_csnbuffer:oflow_node", which is child of megafunction instantiation "lpm_add_sub:Add0" Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter: Info: Parameter "LPM_WIDTH" = "7" Info: Parameter "LPM_DIRECTION" = "ADD" Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED" Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO" Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|addcore:adder|addcore:adder[0]|a_csnbuffer:result_node", which is child of megafunction instantiation "lpm_add_sub:Add0" Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter: Info: Parameter "LPM_WIDTH" = "7" Info: Parameter "LPM_DIRECTION" = "ADD" Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED" Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO" Info: Found 1 design units, including 1 entities, in source file ../../../../altera6/quartus60/libraries/megafunctions/altshift.tdf Info: Found entity 1: altshift Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "lpm_add_sub:Add0" Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter: Info: Parameter "LPM_WIDTH" = "7" Info: Parameter "LPM_DIRECTION" = "ADD" Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED" Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO" Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|altshift:carry_ext_latency_ffs", which is child of megafunction instantiation "lpm_add_sub:Add0" Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter: Info: Parameter "LPM_WIDTH" = "7" Info: Parameter "LPM_DIRECTION" = "ADD" Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED" Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO" Info: Elaborated megafunction instantiation "lpm_add_sub:Add1" Info: Ignored 8 buffer(s) Info: Ignored 8 SOFT buffer(s) Info: Implemented 19 device resources after synthesis - the final resource count might be different Info: Implemented 8 input pins Info: Implemented 5 output pins Info: Implemented 6 macrocells Info: Quartus II Analysis & Synthesis was successful. 0 errors, 2 warnings Info: Processing ended: Sat Apr 14 21:15:34 2007 Info: Elapsed time: 00:00:19 Info: ******************************************************************* Info: Running Quartus II Fitter Info: Version 6.0 Build 178 04/27/2006 SJ Full Version Info: Processing started: Sat Apr 14 21:15:46 2007 Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off fpdiv -c fpdiv Info: Selected device EPM3064ATC44-10 for design "fpdiv" Info: Quartus II Fitter was successful. 0 errors, 0 warnings Info: Processing ended: Sat Apr 14 21:15:48 2007 Info: Elapsed time: 00:00:03 Info: ******************************************************************* Info: Running Quartus II Assembler Info: Version 6.0 Build 178 04/27/2006 SJ Full Version Info: Processing started: Sat Apr 14 21:15:54 2007 Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off fpdiv -c fpdiv Info: Assembler is generating device programming files Info: Quartus II Assembler was successful. 0 errors, 0 warnings Info: Processing ended: Sat Apr 14 21:15:56 2007 Info: Elapsed time: 00:00:03 Info: ******************************************************************* Info: Running Quartus II Timing Analyzer Info: Version 6.0 Build 178 04/27/2006 SJ Full Version Info: Processing started: Sat Apr 14 21:16:00 2007 Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off fpdiv -c fpdiv Info: Started post-fitting delay annotation Info: Delay annotation completed successfully Warning: Timing Analysis does not support the analysis of latches as synchronous elements for the currently selected device family Info: Longest tpd from source pin "B[0]" to destination pin "data_out[0]" is 10.900 ns Info: 1: + IC(0.000 ns) + CELL(1.400 ns) = 1.400 ns; Loc. = PIN_10; Fanout = 13; PIN Node = 'B[0]' Info: 2: + IC(2.300 ns) + CELL(1.200 ns) = 4.900 ns; Loc. = LC2; Fanout = 1; COMB Node = 'data_out~810' Info: 3: + IC(0.000 ns) + CELL(4.200 ns) = 9.100 ns; Loc. = LC3; Fanout = 1; COMB Node = 'data_out~809' Info: 4: + IC(0.000 ns) + CELL(1.800 ns) = 10.900 ns; Loc. = PIN_5; Fanout = 0; PIN Node = 'data_out[0]' Info: Total cell delay = 8.600 ns ( 78.90 % ) Info: Total interconnect delay = 2.300 ns ( 21.10 % ) Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning Info: Processing ended: Sat Apr 14 21:16:01 2007 Info: Elapsed time: 00:00:03 Info: Quartus II Full Compilation was successful. 0 errors, 3 warnings |
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