用QuartusII编译说
Error (10500): VHDL syntax error at ep111.vhd(49) near text "when"; expecting ";"
程序如下：：
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity ep111 is
Port ( clk : in STD_LOGIC;
reset : in STD_LOGIC;
dir : in STD_LOGIC;
A : out STD_LOGIC;
B : out STD_LOGIC;
C : out STD_LOGIC);
end ep111;
architecture Behavioral of ep111 is
Signal abc : STD_LOGIC_VECTOR(2 DOWNTO 0);
begin
process(clk,reset)
begin
if rising_edge(clk) then
if reset='1' then
abc <= "100";
elsif dir='0' then
abc <= "110" when abc="100" else
--就是这里有问题
"010" when abc="110" else
"011" when abc="010" else
"001" when abc="011" else
"101" when abc="001" else
"100" when abc="101" else
"000";
elsif dir='1' then
abc <= "101" when abc="100" else
"001" when abc="101" else
"011" when abc="001" else
"010" when abc="011" else
"110" when abc="010" else
"100" when abc="110" else
"000";
end if;
end if;
end process;
A <= abc(2);
B <= abc(1);
C <= abc(0);
end Behavioral; |
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