4#一朝成名
STM32F103x6、STM32F103x8、STM32F103xB
Features
■ Core: ARM 32-bit Cortex™-M3 CPU
– 72 MHz, 90 DMIPS with 1.25 DMIPS/MHz
– Single-cycle multiplication and hardware
division
– Nested interrupt controller with 43
maskable interrupt channels
– Interrupt processing (down to 6 CPU
cycles) with tail chaining
■ Memories
– 32-to-128 Kbytes of Flash memory
– 6-to-20 Kbytes of SRAM
■ Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR, and programmable voltage
detector (PVD)
– 4-to-16 MHz quartz oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 32 kHz RC
– PLL for CPU clock
– Dedicated 32 kHz oscillator for RTC with
calibration
■ Low power
– Sleep, Stop and Standby modes
– VBAT supply for RTC and backup registers
■ 2 x 12-bit, 1 μs A/D converters (16-channel)
– Conversion range: 0 to 3.6 V
– Dual-sample and hold capability
– Synchronizable with advanced control timer
– Temperature sensor
■ DMA
– 7-channel DMA controller
– Peripherals supported: timers, ADC, SPIs,
I2Cs and USARTs
■ Debug mode
– Serial wire debug (SWD) & JTAG inte**ces
■ Up to 80 fast I/O ports
– 32/49/80 5 V-tolerant I/Os
– All mappable on 16 external interrupt
vectors
– Atomic read/modify/write operations
■ Up to 7 timers
– Up to three 16-bit timers, each with up to 4
IC/OC/PWM or pulse counter
– 16-bit, 6-channel advanced control timer:
up to 6 channels for PWM output
Dead time generation and emergency
stop
– 2 x 16-bit watchdog timers (Independent
and Window)
– SysTick timer: a 24-bit downcounter
■ Up to 9 communication inte**ces
– Up to 2 x I2C inte**ces (SMBus/PMBus)
– Up to 3 USARTs (ISO 7816 inte**ce, LIN,
IrDA capability, modem control)
– Up to 2 SPIs (18 Mbit/s)
– CAN inte**ce (2.0B Active)
– USB 2.0 full speed inte**ce
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