不知道是不是 MDK 的 驱动问题 S3C2440_NAND_SP 初始化 代码 如下
int InitFlashController_HW (unsigned char *bus_width, unsigned char *adr_cycles, unsigned char *page_type, unsigned long clk) {
if (NFCONF & (1 << 3)) { // Advanced NAND Flash (Large Page)
*bus_width = 16;
*page_type = LARGE_PAGE;
*adr_cycles = (NFCONF & (1 << 1)) ? 5 : 4;
} else { // Normal NAND Flash (Small Page)
*bus_width = 8;
*page_type = SMALL_PAGE;
*adr_cycles = (NFCONF & (1 << 1)) ? 4 : 3;
}
// Remember parameters locally
bus_width_hw = *bus_width;
adr_cycles_hw = *adr_cycles;
page_type_hw = *page_type;
// Set important registers to reset values as hardware reset is not functional
// through JTAG reset pin
INTMSK = 0xFFFFFFFF;
CLKCON = 0x001FFFF0;
GPACON = 0xFFFFFFFF;
// Disable Write Protect, drive nFWP pin high
GPBUP |= 0x0080;
GPBCON |= 0x4000;
GPBDAT |= 0x0080;
// Set: TACLS = 3, TWRPH0 = 7, TWRPH1 = 7
NFCONF = (3 << 12) | (7 << 8) | (7 << 4);
// Set: Lock spare ECC generation, Lock main data area ECC generation,
// Initialize ECC encoder/decoder, NAND flash controller enable
NFCONT = (1 << 6) | (1 << 5) | (1 << 4) | (1 << 0);
while (!(NFSTAT & 0x01)); // Wait while controller busy
NFCMMD = NAND_CMD_RESET; // Reset NAND flash
while (!(NFSTAT & 0x01)); // Wait while controller busy
NFSBLK = (0x00000000 >> 9); // NAND Flash prog start block address
NFEBLK = (0x08000000 >> 9); // NAND Flash prog end block address
return (NAND_OK);
} |
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