本帖最后由 fanhoufa 于 2010-6-28 17:17 编辑
u16 hCCDmaBuffCh1[4];
u16 hCCDmaBuffCh2[4];
u16 hCCDmaBuffCh3[4];
u16 hCCDmaBuffCh4[4];
DMA_DeInit(DMA1_Channel2);
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)TIM1_CCR1_Address;
DMA_InitStructure.DMA_MemoryBaseAddr = (u32)(hCCDmaBuffCh1);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = 4;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel2, &DMA_InitStructure);
//Enable DMA Channel2 //
//DMA_Cmd(DMA_Channel2, ENABLE);
DMA_Cmd(DMA1_Channel2, DISABLE);
// TIM1 Channel 2 toggle mode /
//DMA Channel3 configuration ----------------------------------------------//
DMA_DeInit(DMA1_Channel3);
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)TIM1_CCR2_Address;
DMA_InitStructure.DMA_MemoryBaseAddr = (u32)(hCCDmaBuffCh2);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = 4;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel3, &DMA_InitStructure);
//Enable DMA Channel3 //
//DMA_Cmd(DMA_Channel3, ENABLE);
DMA_Cmd(DMA1_Channel3, DISABLE);
// TIM1 Channel 3 toggle mode //
// DMA Channel6 configuration ----------------------------------------------//
DMA_DeInit(DMA1_Channel6);
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)TIM1_CCR3_Address;
DMA_InitStructure.DMA_MemoryBaseAddr = (u32)(hCCDmaBuffCh3);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = 4;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel6, &DMA_InitStructure);
// Enable DMA Channel6 //
DMA_Cmd(DMA1_Channel6, DISABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
//启动TIM1
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
/* TIM1 Peripheral Configuration -------------------------------------------*/
// TIM1 Registers reset //
TIM_DeInit(TIM1);
TIM_TimeBaseStructInit(&TIM1_TimeBaseStructure);
// Time Base configuration /
TIM1_TimeBaseStructure.TIM_Prescaler = 0x0;
TIM1_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned3;
TIM1_TimeBaseStructure.TIM_Period = PWM_PERIOD;
TIM1_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
// Initial condition is REP=0 to set the UPDATE only on the underflow
TIM1_TimeBaseStructure.TIM_RepetitionCounter = REP_RATE;
TIM_TimeBaseInit(TIM1, &TIM1_TimeBaseStructure);
TIM_OCStructInit(&TIM1_OCInitStructure);
// Channel 1, 2,3 in PWM mode /
TIM1_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM1_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM1_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM1_OCInitStructure.TIM_Pulse = PWM_PERIOD >> 1; //dummy value
TIM1_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM1_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low;
TIM1_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
TIM1_OCInitStructure.TIM_OCNIdleState = LOW_SIDE_POLARITY;
TIM_OC1Init(TIM1, &TIM1_OCInitStructure);
TIM_OC3Init(TIM1, &TIM1_OCInitStructure);
TIM_OC2Init(TIM1, &TIM1_OCInitStructure);
这个主要是电机控制过程中的PWM初始化过程。DMA主要是传输 值到TIM1 -> CCR1
TIM1->CCR2 TIM2 ->CCR3 更新。
这个初始化的过程中,为什么DMA_BufferSize要用到4,而不是1. |