ADDC__8_8.inc 文件:
;-------------------------------------------------------------
;
; 8位加法器
;
; R16+R17--->R17,R18(低在先)
;
;
; 输入两个8位常数 var1 和 var2,
; 输出一个16位数 R17,R18(低在先)
;
;
;-------------------------------------------------------------
.macro LDI__Rn
.if ((@1 >> 7) & 0x01)
SET
.else
CLT
.endif
BLD @0,7
.if ((@1 >> 6) & 0x01)
SET
.else
CLT
.endif
BLD @0,6
.if ((@1 >> 5) & 0x01)
SET
.else
CLT
.endif
BLD @0,5
.if ((@1 >> 4) & 0x01)
SET
.else
CLT
.endif
BLD @0,4
.if ((@1 >> 3) & 0x01)
SET
.else
CLT
.endif
BLD @0,3
.if ((@1 >> 2) & 0x01)
SET
.else
CLT
.endif
BLD @0,2
.if ((@1 >> 1) & 0x01)
SET
.else
CLT
.endif
BLD @0,1
.if (@1 & 0x01)
SET
.else
CLT
.endif
BLD @0,0
.endmacro
.macro CLR__Rn
CLT
BLD @0,7
BLD @0,6
BLD @0,5
BLD @0,4
BLD @0,3
BLD @0,2
BLD @0,1
BLD @0,0
.endmacro
.macro BMOV ; Rn,b <--- Ri,b
BST @2, @3
BLD @0, @1
.endmacro
.macro ADDC__1_1 ;(An,n),(Bn,n),(Cy,n)
; (An,n)+(Bn,n)+(Cy,n)==(Cy,n),(An,n)
SBRS @4,@5 ; Cy,n
RJMP CyC
CyS: SBRC @2,@3 ; Bn,n
RJMP SBnS
SBnC: SBRS @0,@1 ; An,n
RJMP SAnC
SAnS: CLT
BLD @0,@1 ; An,n
RJMP ADDC__1_1_END
SAnC: CLT
BLD @4,@5 ; Cy,n
SET
BLD @0,@1 ; An,n
SBnS: RJMP ADDC__1_1_END
CyC: SBRS @0,@1 ; An,n
RJMP CAnC
CAnS: SBRS @2,@3 ; Bn,n
RJMP CBnC
CBnS: SET
BLD @4,@5 ; Cy,n
CLT
BLD @0,@1 ; An,n
CBnC: RJMP ADDC__1_1_END
CAnC: BMOV @0,@1,@2,@3 ; An,n,Bn,n
ADDC__1_1_END:
.endmacro
.macro ADDC__8_8 ; R16+R17--->R17,R18(低在先)
CLR__Rn R18
ADDC__1_1 R17,0,R16,0,R18,0
ADDC__1_1 R17,1,R16,1,R18,0
ADDC__1_1 R17,2,R16,2,R18,0
ADDC__1_1 R17,3,R16,3,R18,0
ADDC__1_1 R17,4,R16,4,R18,0
ADDC__1_1 R17,5,R16,5,R18,0
ADDC__1_1 R17,6,R16,6,R18,0
ADDC__1_1 R17,7,R16,7,R18,0
.endmacro |