我的程序如下：
void IRQ1_ISR(void)
{
key1 = 1;
AT91C_BASE_AIC->AIC_ICCR = 1 << AT91C_ID_IRQ1; // Clear interrupt
AT91C_BASE_AIC->AIC_EOICR = 1 << AT91C_ID_IRQ1; //end interrupt
}
主函数：
中断配置：
AT91C_BASE_PMC->PMC_PCER = 0x40000000; //使能IRQ1控制时钟
AT91C_BASE_PIOB->PIO_BSR |= 0x40000000; //PB30 设定为外设A(IRQ1)
AIC_DisableIT(AT91C_ID_IRQ1); //禁止IRQ1中断
/*配置IRQ1中断，下降沿触发，中断服务子程序为IRQ1_ISR*/
AIC_ConfigureIT（AT91C_ID_IRQ1,
AT91C_AIC_PRIOR_LOWEST|AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE),IRQ1_ISR); //
AIC_EnableIT(AT91C_ID_IRQ1); //使能IRQ1中断
另外我的启动文件里面程序为：
AREA VECTOR, CODE
ARM
; Exception Vectors
Vectors
LDR pc,=resetHandler
undefVector
b undefVector ; Undefined instruction
swiVector
b swiVector ; Software interrupt
prefetchAbortVector
b prefetchAbortVector ; Prefetch abort
dataAbortVector
b dataAbortVector ; Data abort
reservedVector
b reservedVector ; Reserved for future use
irqVector
b irqHandler ; Interrupt
fiqVector
; Fast interrupt
;
;------------------------------------------------------------------------------
; Handles a fast interrupt request by branching to the address defined in the
; AIC.
;------------------------------------------------------------------------------
fiqHandler
b fiqHandler
;------------------------------------------------------------------------------
; Handles incoming interrupt requests by branching to the corresponding
; handler, as defined in the AIC. Supports interrupt nesting.
;------------------------------------------------------------------------------
irqHandler
; Save interrupt context on the stack to allow nesting */
SUB lr, lr, #4
STMFD sp!, {lr}
MRS lr, SPSR
STMFD sp!, {r0,r1,lr}
; Write in the IVR to support Protect Mode */
LDR lr, =AT91C_BASE_AIC
LDR r0, [r14, #AIC_IVR]
STR lr, [r14, #AIC_IVR]
; Branch to interrupt handler in Supervisor mode */
MSR CPSR_c, #ARM_MODE_SVC
STMFD sp!, {r1-r4, r12, lr}
MOV lr, pc
BX r0
LDMIA sp!, {r1-r4, r12, lr}
MSR CPSR_c, #ARM_MODE_IRQ | I_BIT
; Acknowledge interrupt */
LDR lr, =AT91C_BASE_AIC
STR lr, [r14, #AIC_EOICR]
; Restore interrupt context and branch back to calling code
LDMIA sp!, {r0,r1,lr}
MSR SPSR_cxsf, lr
LDMIA sp!, {pc}^
;------------------------------------------------------------------------------
; After a reset, execution starts here, the mode is ARM, supervisor
; with interrupts disabled.
; Initializes the chip and branches to the main() function.
;------------------------------------------------------------------------------
AREA cstartup, CODE
ENTRY ; Entry point for the application
; Reset Handler
EXPORT resetHandler
IMPORT |Image$$Fixed_region$$Limit|
IMPORT |Image$$Relocate_region$$Base|
IMPORT |Image$$Relocate_region$$ZI$$Base|
IMPORT |Image$$Relocate_region$$ZI$$Limit|
IMPORT |Image$$ARM_LIB_STACK$$Base|
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
; Perform low-level initialization of the chip using LowLevelInit()
IMPORT LowLevelInit
resetHandler
; Set pc to actual code location (i.e. not in remap zone)
g LDR pc, =label
label
; Set up temporary stack (Top of the SRAM)
LDR r0, = |Image$$ARM_LIB_STACK$$ZI$$Limit|
MOV sp, r0
; Call Low level init
LDR r0, =LowLevelInit
MOV lr, pc
BX r0
;Initialize the Relocate_region segment
LDR r0, = |Image$$Fixed_region$$Limit|
LDR r1, = |Image$$Relocate_region$$Base|
LDR r3, = |Image$$Relocate_region$$ZI$$Base|
CMP r0, r1
BEQ %1
; Copy init data
0 CMP r1, r3
LDRCC r2, [r0], #4
STRCC r2, [r1], #4
BCC %0
1 LDR r1, =|Image$$Relocate_region$$ZI$$Limit|
MOV r2, #0
2 CMP r3, r1
STRCC r2, [r3], #4
BCC %2
; Setup Stack for each mode
LDR R0, = |Image$$ARM_LIB_STACK$$ZI$$Limit|
; Enter Undefined Instruction Mode and set its Stack Pointer
MSR CPSR_c, #ARM_MODE_UND:OR:I_BIT:OR:F_BIT
MOV SP, R0
SUB R0, R0, #UND_Stack_Size
; Enter Abort Mode and set its Stack Pointer
MSR CPSR_c, #ARM_MODE_ABT:OR:I_BIT:OR:F_BIT
MOV SP, R0
SUB R0, R0, #ABT_Stack_Size
; Enter FIQ Mode and set its Stack Pointer
MSR CPSR_c, #ARM_MODE_FIQ:OR:I_BIT:OR:F_BIT
MOV SP, R0
SUB R0, R0, #FIQ_Stack_Size
; Enter IRQ Mode and set its Stack Pointer
MSR CPSR_c, #ARM_MODE_IRQ:OR:I_BIT:OR:F_BIT
MOV SP, R0
SUB R0, R0, #IRQ_Stack_Size
; Enter Supervisor Mode and set its Stack Pointer
MSR CPSR_c, #ARM_MODE_SVC|F_BIT
MOV SP, R0
SUB R0, R0, #SVC_Stack_Size
; Enter IRQ Mode and set its Stack Pointer
; MSR CPSR_c, #ARM_MODE_IRQ:OR:I_BIT:OR:F_BIT
; MOV SP, R0
; SUB R4, SP, #IRQ_Stack_Size
; Supervisor mode (interrupts enabled)
; MSR CPSR_c, #ARM_MODE_SVC | F_BIT
; MOV SP, R4
LDR R0, =MATRIX_BASE
MOV R1, #3 ; Remap for Instruction and Data Master
STR R1, [R0, #MATRIX_MCFG_OFS] ; Execute Remap
; Enter the C code
IMPORT __main
LDR R0, =__main
BX R0
loop4
B loop4
END |
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