这个功能在M3上比较不好实现。因为M3没有硬件支持相移的功能，只能通过软件去做。
1） GEN 0 响应中断，在中断里面打开GEN 1 。
2） 先设置GEN 0 Load 与GEN 1 load 值 不一样。当gen0 中断进来后，修改gen 1 的load 值。
第一种方法代码：
//*****************************************************************************
//
// pwmgen.c - PWM signal generation example.
//
// Copyright (c) 2009-2010 Texas Instruments Incorporated. All rights reserved.
// Software License Agreement
//
// Texas Instruments (TI) is supplying this software for use solely and
// exclusively on TI's microcontroller products. The software is owned by
// TI and/or its suppliers, and is protected under applicable copyright
// laws. You may not combine this software with "viral" open-source
// software in order to form a larger program.
//
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
// DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 6459 of the EK-LM3S9B92 Firmware Package.
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "inc/hw_ints.h"
#include "driverlib/debug.h"
#include "driverlib/gpio.h"
#include "driverlib/pwm.h"
#include "driverlib/rom.h"
#include "driverlib/sysctl.h"
#include "utils/uartstdio.h"
//*****************************************************************************
//
//! \addtogroup example_list
//! <h1>PWM (pwmgen)</h1>
//!
//! This example application utilizes the PWM peripheral to output a 25% duty
//! cycle PWM signal and a 75% duty cycle PWM signal, both at 440 Hz. Once
//! configured, the application enters an infinite loop, doing nothing while
//! the PWM peripheral continues to output its signals.
//!
//! UART0, connected to the FTDI virtual COM port and running at 115,200,
//! 8-N-1, is used to display messages from this application.
//
//*****************************************************************************
#define PIN_UART0RX_PORT GPIO_PORTA_BASE
#define PIN_UART0RX_PIN GPIO_PIN_0
#define PIN_UART0TX_PORT GPIO_PORTA_BASE
#define PIN_UART0TX_PIN GPIO_PIN_1
//! The GPIO port on which the phase U low side pin resides.
//! The GPIO pin on which the phase U low side pin resides.
//! The GPIO port on which the phase U high side pin resides.
//! The GPIO pin on which the phase U high side pin resides.
//*****************************************************************************
#define PIN_PHASEU_LOW_PORT GPIO_PORTA_BASE
#define PIN_PHASEU_LOW_PIN GPIO_PIN_7
#define PIN_PHASEU_HIGH_PORT GPIO_PORTA_BASE
#define PIN_PHASEU_HIGH_PIN GPIO_PIN_6
//*****************************************************************************
//! The GPIO port on which the phase V low side pin resides.
////! The GPIO pin on which the phase V low side pin resides.
//! The GPIO port on which the phase V high side pin resides.
//! The GPIO pin on which the phase V high side pin resides.
//*****************************************************************************
#define PIN_PHASEV_LOW_PORT GPIO_PORTD_BASE
#define PIN_PHASEV_LOW_PIN GPIO_PIN_2
#define PIN_PHASEV_HIGH_PORT GPIO_PORTD_BASE
#define PIN_PHASEV_HIGH_PIN GPIO_PIN_3
//*****************************************************************************
//! The GPIO port on which the phase W low side pin resides.
//! The GPIO pin on which the phase W low side pin resides.
//! The GPIO port on which the phase W high side pin resides.
//! The GPIO pin on which the phase W high side pin resides.
//*****************************************************************************
#define PIN_PHASEW_LOW_PORT GPIO_PORTA_BASE
#define PIN_PHASEW_LOW_PIN GPIO_PIN_3
#define PIN_PHASEW_HIGH_PORT GPIO_PORTA_BASE
#define PIN_PHASEW_HIGH_PIN GPIO_PIN_2
#define CPU_CLK 80
#define C_DEAD_TIME 10
//*****************************************************************************
//
// The error routine that is called if the driver library encounters an error.
//
//*****************************************************************************
#ifdef DEBUG
void
__error__(char *pcFilename, unsigned long ulLine)
{
}
#endif
void
TIM1_UP_IRQHandler(void)
{
HWREG(0x4002804c) = 0xffffffff;
PWMGenEnable(PWM_BASE, PWM_GEN_1);
PWMGenIntStatus(PWM_BASE, PWM_GEN_0, true);
PWMGenIntClear(PWM_BASE, PWM_GEN_0, PWM_INT_CNT_ZERO | PWM_INT_CNT_LOAD | PWM_TR_CNT_ZERO | PWM_TR_CNT_LOAD|PWM_INT_CNT_BU|PWM_INT_CNT_AU);
PWMGenIntClear(PWM_BASE, PWM_GEN_0, PWM_INT_CNT_ZERO | PWM_INT_CNT_LOAD | PWM_TR_CNT_ZERO | PWM_TR_CNT_LOAD);
}
void
Fault_IRQHandler(void)
{
//u32 intfault;
//u32 intfault1;
//intfault=PWMGenFaultStatus(PWM_BASE, PWM_GEN_0,PWM_FAULT_GROUP_1);
HWREG(0x40028804) = 0x000000ff;
// HWREG(0x4002801c) = 0x00ff00ff;
// HWREG(0x4002801c) = 0x00ff00ff;
// HWREG(PWM_BASE + PWM_INT_FAULT1 + (LCD_WR_PIN << 2)) = 0;
PWMFaultIntClearExt(PWM_BASE,PWM_INT_FAULT0|PWM_INT_FAULT1|PWM_INT_FAULT2);
PWMGenFaultStatus(PWM_BASE, PWM_GEN_0 , PWM_FAULT_GROUP_0);
PWMGenFaultClear(PWM_BASE, PWM_GEN_0,PWM_FAULT_GROUP_0, PWM_FAULT_FAULT3|PWM_FAULT_FAULT1|PWM_FAULT_FAULT2|PWM_FAULT_FAULT0);
PWMGenFaultClear(PWM_BASE, PWM_GEN_1,PWM_FAULT_GROUP_0, PWM_FAULT_FAULT3|PWM_FAULT_FAULT1|PWM_FAULT_FAULT2|PWM_FAULT_FAULT0);
PWMGenFaultClear(PWM_BASE, PWM_GEN_2,PWM_FAULT_GROUP_0, PWM_FAULT_FAULT3|PWM_FAULT_FAULT1|PWM_FAULT_FAULT2|PWM_FAULT_FAULT0);
}
//#define ENABLE_GEN3 1
void
InitSetPWM(void)
{
GPIOPinConfigure(GPIO_PA6_PWM0);
GPIOPinConfigure(GPIO_PA7_PWM1);
// GPIOPinConfigure(GPIO_PB0_PWM2);
// GPIOPinConfigure(GPIO_PB1_PWM3);
GPIOPinConfigure(GPIO_PA2_PWM4);
GPIOPinConfigure(GPIO_PA3_PWM5);
//GPIOPinConfigure(GPIO_PA4_PWM6);
//GPIOPinConfigure(GPIO_PA5_PWM7);
//
GPIOPinConfigure(GPIO_PA4_CAN0RX);
GPIOPinConfigure(GPIO_PA5_CAN0TX);
GPIOPinConfigure(GPIO_PD2_PWM2);
GPIOPinConfigure(GPIO_PD3_PWM3);
//GPIOPinTypePWM(GPIO_PORTD_BASE, GPIO_PIN_2 | GPIO_PIN_3);
GPIOPinTypePWM(PIN_PHASEU_LOW_PORT,
PIN_PHASEU_LOW_PIN | PIN_PHASEU_HIGH_PIN);
GPIOPinTypePWM(PIN_PHASEV_LOW_PORT,
PIN_PHASEV_LOW_PIN | PIN_PHASEV_HIGH_PIN);
GPIOPinTypePWM(PIN_PHASEW_LOW_PORT,
PIN_PHASEW_LOW_PIN | PIN_PHASEW_HIGH_PIN);
GPIOPinTypeCAN(GPIO_PORTA_BASE, GPIO_PIN_4|GPIO_PIN_5);
GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_4|GPIO_PIN_5, GPIO_STRENGTH_2MA,
GPIO_PIN_TYPE_STD_WPU);
//GPIOPinTypePWM(GPIO_PORTA_BASE, GPIO_PIN_4|GPIO_PIN_5);
// synchronous updates, and to stop at zero on debug events.
PWMGenConfigure(PWM_BASE, PWM_GEN_0, (PWM_GEN_MODE_UP_DOWN |
PWM_GEN_MODE_NO_SYNC |
// PWM_GEN_MODE_DBG_STOP|
PWM_GEN_MODE_DB_SYNC_LOCAL|
PWM_GEN_MODE_FAULT_LATCHED |
PWM_GEN_MODE_FAULT_EXT|
PWM_GEN_MODE_FAULT_MINPER)); //
PWMGenConfigure(PWM_BASE, PWM_GEN_1, (PWM_GEN_MODE_UP_DOWN |
PWM_GEN_MODE_NO_SYNC |
//PWM_GEN_MODE_DBG_STOP|
PWM_GEN_MODE_DB_SYNC_LOCAL|
PWM_GEN_MODE_FAULT_LATCHED |
PWM_GEN_MODE_FAULT_EXT|
PWM_GEN_MODE_FAULT_MINPER)); //
PWMGenConfigure(PWM_BASE, PWM_GEN_2, (PWM_GEN_MODE_UP_DOWN |
PWM_GEN_MODE_NO_SYNC |
//PWM_GEN_MODE_DBG_STOP|
PWM_GEN_MODE_DB_SYNC_LOCAL|
PWM_GEN_MODE_FAULT_LATCHED |
PWM_GEN_MODE_FAULT_EXT|
PWM_GEN_MODE_FAULT_MINPER)); // PWM_GEN_MODE_FAULT_LATCHED
#ifdef ENABLE_GEN3
PWMGenConfigure(PWM_BASE, PWM_GEN_3, (PWM_GEN_MODE_UP_DOWN |
PWM_GEN_MODE_NO_SYNC |
//PWM_GEN_MODE_DBG_STOP|
PWM_GEN_MODE_DB_SYNC_LOCAL|
PWM_GEN_MODE_FAULT_LATCHED |
PWM_GEN_MODE_FAULT_EXT|
PWM_GEN_MODE_FAULT_MINPER)); // PWM_GEN_MODE_FAULT_LATCHED
#endif
// Configure the PWM period, duty cycle, and dead band. The initial period
// is 5 KHz (for triggering the ADC), which will be increased when the
// motor starts running.
PWMGenPeriodSet(PWM_BASE, PWM_GEN_0, CPU_CLK*1000000 / 5000);
PWMGenPeriodSet(PWM_BASE, PWM_GEN_1, CPU_CLK*1000000 / 5000);
PWMGenPeriodSet(PWM_BASE, PWM_GEN_2, CPU_CLK*1000000 / 5000);
#ifdef ENABLE_GEN3
PWMGenPeriodSet(PWM_BASE, PWM_GEN_3, CPU_CLK*1000000 / 5000);
#endif
PWMPulseWidthSet(PWM_BASE, PWM_OUT_0,CPU_CLK*1000000 / 10000);
PWMPulseWidthSet(PWM_BASE, PWM_OUT_1,CPU_CLK*1000000 / 10000);
PWMPulseWidthSet(PWM_BASE, PWM_OUT_2,CPU_CLK*1000000 / 10000);
PWMPulseWidthSet(PWM_BASE, PWM_OUT_4,CPU_CLK*1000000 / 10000);
#ifdef ENABLE_GEN3
PWMPulseWidthSet(PWM_BASE, PWM_OUT_6,CPU_CLK*1000000 / 10000);
#endif
PWMDeadBandEnable(PWM_BASE, PWM_GEN_0, C_DEAD_TIME, C_DEAD_TIME);
PWMDeadBandEnable(PWM_BASE, PWM_GEN_1, C_DEAD_TIME, C_DEAD_TIME);
PWMDeadBandEnable(PWM_BASE, PWM_GEN_2, C_DEAD_TIME, C_DEAD_TIME);
#ifdef ENABLE_GEN3
PWMDeadBandEnable(PWM_BASE, PWM_GEN_3, C_DEAD_TIME, C_DEAD_TIME);
#endif
// Synchronize the time base of the generators.
#if SYNC_ENABLE
PWMSyncTimeBase(PWM_BASE, PWM_GEN_0_BIT | PWM_GEN_1_BIT | PWM_GEN_2_BIT);
PWMSyncUpdate(PWM_BASE, PWM_GEN_0_BIT | PWM_GEN_1_BIT | PWM_GEN_2_BIT);
#endif
PWMGenIntTrigEnable(PWM_BASE, PWM_GEN_0,PWM_INT_CNT_AU | PWM_INT_CNT_BU);
PWMGenIntTrigEnable(PWM_BASE, PWM_GEN_0,PWM_TR_CNT_ZERO | PWM_TR_CNT_LOAD);
// Set all six PWM outputs to go to the inactive state when a fault event
// occurs (which includes debug events).
// ENable all six PWM outputs.
PWMOutputState(PWM_BASE, (PWM_OUT_0_BIT | PWM_OUT_1_BIT | PWM_OUT_2_BIT |
PWM_OUT_3_BIT | PWM_OUT_4_BIT | PWM_OUT_5_BIT),true);
//PWMOutputState(PWM_BASE,PWM_OUT_6_BIT | PWM_OUT_7_BIT,0);
// Configure the fault signal from the power module as a falling edge
// interrupt.
#ifdef FAULT_ENABLE
GPIOPinConfigure(GPIO_PB3_FAULT3);
GPIOPinTypePWM(GPIO_PORTB_BASE,GPIO_PIN_3);
GPIOPinConfigure(GPIO_PB6_FAULT1);
GPIOPinTypePWM(GPIO_PORTB_BASE,GPIO_PIN_6);
PWMGenFaultConfigure(PWM_BASE, PWM_GEN_0,5,PWM_FAULT3_SENSE_LOW|PWM_FAULT1_SENSE_LOW); //PWM_FAULT0_SENSE_HIGH
PWMGenFaultTriggerSet(PWM_BASE, PWM_GEN_0,PWM_FAULT_GROUP_0, PWM_FAULT_FAULT3|PWM_FAULT_FAULT1);
PWMGenFaultClear(PWM_BASE, PWM_GEN_0,PWM_FAULT_GROUP_0, PWM_FAULT_FAULT3|PWM_FAULT_FAULT1);
PWMGenFaultConfigure(PWM_BASE, PWM_GEN_1,5,PWM_FAULT3_SENSE_LOW|PWM_FAULT1_SENSE_LOW);
PWMGenFaultTriggerSet(PWM_BASE, PWM_GEN_1,PWM_FAULT_GROUP_0, PWM_FAULT_FAULT3|PWM_FAULT_FAULT1);
PWMGenFaultClear(PWM_BASE, PWM_GEN_1,PWM_FAULT_GROUP_0, PWM_FAULT_FAULT3|PWM_FAULT_FAULT1);
PWMGenFaultConfigure(PWM_BASE, PWM_GEN_2,5,PWM_FAULT3_SENSE_LOW|PWM_FAULT1_SENSE_LOW);
PWMGenFaultTriggerSet(PWM_BASE, PWM_GEN_2,PWM_FAULT_GROUP_0,PWM_FAULT_FAULT3|PWM_FAULT_FAULT1);
PWMGenFaultClear(PWM_BASE, PWM_GEN_2,PWM_FAULT_GROUP_0, PWM_FAULT_FAULT3|PWM_FAULT_FAULT1);
#ifdef ENABLE_GEN3
PWMGenFaultConfigure(PWM_BASE, PWM_GEN_3,5,PWM_FAULT3_SENSE_LOW);
PWMGenFaultTriggerSet(PWM_BASE, PWM_GEN_3,PWM_FAULT_GROUP_0,PWM_FAULT_FAULT3);
PWMGenFaultClear(PWM_BASE, PWM_GEN_3,PWM_FAULT_GROUP_0, PWM_FAULT_FAULT3);
#endif
PWMOutputFault(PWM_BASE,PWM_OUT_0_BIT | PWM_OUT_1_BIT | PWM_OUT_2_BIT |PWM_OUT_3_BIT | PWM_OUT_4_BIT |PWM_OUT_5_BIT,true);/*使能PWM输出响应故障触发*/
PWMOutputFaultLevel(PWM_BASE,PWM_OUT_0_BIT | PWM_OUT_1_BIT | PWM_OUT_2_BIT |PWM_OUT_3_BIT | PWM_OUT_4_BIT |PWM_OUT_5_BIT,true);
#endif
PWMGenEnable(PWM_BASE, PWM_GEN_0);
PWMGenDisable(PWM_BASE, PWM_GEN_1);
PWMGenDisable(PWM_BASE, PWM_GEN_2);
PWMGenDisable(PWM_BASE, PWM_GEN_3);
//SysCtlDelay(1000);
}
void
SetInterruptEnable(void)
{
IntMasterEnable();
//ADCIntEnable(ADC0_BASE,2);
//IntEnable(INT_ADC0SS2);
PWMIntEnable(PWM_BASE, PWM_INT_GEN_0);
IntEnable(INT_PWM0);
#ifdef FAULT_ENABLE
PWMIntEnable(PWM_BASE,PWM_INT_FAULT0|PWM_INT_FAULT1|PWM_INT_FAULT2);
//PWMIntEnable(PWM_BASE,PWM_INT_FAULT1);
//PWMIntEnable(PWM_BASE,PWM_INT_FAULT2);
IntEnable(INT_PWM_FAULT);
#endif
}
//*****************************************************************************
//
// This example demonstrates how to setup the PWM block to generate signals.
//
//*****************************************************************************
int
main(void)
{
unsigned long ulPeriod;
//
// Set the clocking to run directly from the crystal.
//
ROM_SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_16MHZ);
ROM_SysCtlPWMClockSet(SYSCTL_PWMDIV_1);
//
// Initialize the UART.
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
GPIOPinConfigure(GPIO_PA0_U0RX);
GPIOPinConfigure(GPIO_PA1_U0TX);
ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
UARTStdioInit(0);
//
// Tell the user what is happening.
//
UARTprintf("\Generating PWM on PD0 and PD1\n");
//
// Enable the peripherals used by this example.
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_PWM);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
//
// Set GPIO D0 and D1 as PWM pins. They are used to output the PWM0 and
// PWM1 signals.
InitSetPWM();
SetInterruptEnable();
/*
//
// Compute the PWM period based on the system clock.
//
ulPeriod = ROM_SysCtlClockGet() / 440;
//
// Set the PWM period to 440 (A) Hz.
//
ROM_PWMGenConfigure(PWM_BASE, PWM_GEN_0,
PWM_GEN_MODE_UP_DOWN | PWM_GEN_MODE_NO_SYNC);
ROM_PWMGenPeriodSet(PWM_BASE, PWM_GEN_0, ulPeriod);
//
// Set PWM0 to a duty cycle of 25% and PWM1 to a duty cycle of 75%.
//
ROM_PWMPulseWidthSet(PWM_BASE, PWM_OUT_0, ulPeriod / 4);
ROM_PWMPulseWidthSet(PWM_BASE, PWM_OUT_1, (ulPeriod * 3) / 4);
//
// Enable the PWM0 and PWM1 output signals.
//
ROM_PWMOutputState(PWM_BASE, PWM_OUT_0_BIT | PWM_OUT_1_BIT, true);
//
// Enable the PWM generator.
//
ROM_PWMGenEnable(PWM_BASE, PWM_GEN_0);
*/
//PWMGenEnable(PWM_BASE, PWM_GEN_0);
//
// Loop forever while the PWM signals are generated.
//
while(1)
{
}
} |
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