/******************************************************************************
* [url=home.php?mod=space&uid=288409]@file[/url] main.c
* [url=home.php?mod=space&uid=895143]@version[/url] V1.00
* $Revision: 5 $
* $Date: 15/10/06 11:04a $
* [url=home.php?mod=space&uid=247401]@brief[/url] Show hard fault information when hard fault happened
*
* @note
* Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include "Mini51Series.h"
/*---------------------------------------------------------------------------------------------------------*/
/* Global variables */
/*---------------------------------------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------------------------------------*/
/* Define functions prototype */
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void);
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Unlock protected registers */
SYS_UnlockReg();
/* Set P5 multi-function pins for XTAL1 and XTAL2 */
SYS->P5_MFP &= ~(SYS_MFP_P50_Msk | SYS_MFP_P51_Msk);
SYS->P5_MFP |= (SYS_MFP_P50_XTAL1 | SYS_MFP_P51_XTAL2);
/* Enable External XTAL (4~24 MHz) */
CLK->PWRCON &= ~CLK_PWRCON_XTLCLK_EN_Msk;
CLK->PWRCON |= (0x1 << CLK_PWRCON_XTLCLK_EN_Pos); // XTAL12M (HXT) Enabled
/* Waiting for 12MHz clock ready */
CLK_WaitClockReady( CLK_CLKSTATUS_XTL_STB_Msk);
/* Switch HCLK clock source to XTAL */
CLK->CLKSEL0 &= ~CLK_CLKSEL0_HCLK_S_Msk;
CLK->CLKSEL0 |= CLK_CLKSEL0_HCLK_S_XTAL;
/* Enable IP clock */
CLK->APBCLK |= CLK_APBCLK_UART_EN_Msk; // UART Clock Enable
/* Select IP clock source */
CLK->CLKSEL1 &= ~CLK_CLKSEL1_UART_S_Msk;
CLK->CLKSEL1 |= (0x0 << CLK_CLKSEL1_UART_S_Pos);// Clock source from external 12 MHz or 32 KHz crystal clock
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically. */
SystemCoreClockUpdate();
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set P1 multi-function pins for UART RXD and TXD */
SYS->P0_MFP &= ~(SYS_MFP_P00_Msk | SYS_MFP_P01_Msk);
SYS->P0_MFP = SYS_MFP_P00_TXD | SYS_MFP_P01_RXD;
/* Lock protected registers */
SYS_LockReg();
}
void UART_Init()
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init UART */
/*---------------------------------------------------------------------------------------------------------*/
UART_Open(UART, 115200);
}
/*---------------------------------------------------------------------------------------------------------*/
/* MAIN function */
/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
char *tmp = 0;
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Init UART for printf */
UART_Init();
strcpy(tmp,"HardFaultTest");
while(1);
}
|