先用两片扩出16个输出，不够还可以再增加
grace生成的USI初始化，还用翻译么？
/*
* ======== USI_init ========
* Initialize Universal Serial Interface
*/
void USI_init(void)
{
/* Disable USI */
USICTL0 |= USISWRST;
/*
* USI Control Register 0
*
* ~USIPE7 -- USI function disabled
* USIPE6 -- USI function enabled
* USIPE5 -- USI function enabled
* ~USILSB -- MSB first
* USIMST -- Master mode
* ~USIGE -- Output latch enable depends on shift clock
* USIOE -- Output enabled
* USISWRST -- USI logic held in reset state
*
* Note: ~<BIT> indicates that <BIT> has value zero
*/
USICTL0 = USIPE6 + USIPE5 + USIMST + USIOE + USISWRST;
/*
* USI Control Register 1
*
* USICKPH -- Data is captured on the first SCLK edge and changed on the following edge
* ~USII2C -- I2C mode disabled
* ~USISTTIE -- Interrupt on START condition disabled
* ~USIIE -- Interrupt disabled
* ~USIAL -- No arbitration lost condition
* ~USISTP -- No STOP condition received
* ~USISTTIFG -- No START condition received. No interrupt pending
* USIIFG -- Interrupt pending
*
* Note: ~<BIT> indicates that <BIT> has value zero
*/
USICTL1 = USICKPH + USIIFG;
/*
* USI Clock Control Register
*
* USIDIV_0 -- Divide by 1
* USISSEL_2 -- SMCLK
* ~USICKPL -- Inactive state is low
* ~USISWCLK -- Input clock is low
*
* Note: ~<BIT> indicates that <BIT> has value zero
*/
USICKCTL = USIDIV_0 + USISSEL_2;
/*
* USI Bit Counter Register
*
* ~USISCLREL -- SCL line is held low if USIIFG is set
* USI16B -- 16-bit shift register mode. Both high and low byte registers USISRL
and USISRH are used. USISR addresses all 16 bits simultaneously
* ~USIIFGCC -- USIIFG automatically cleared on USICNTx update
* ~USICNT4 -- USI bit count
* ~USICNT3 -- USI bit count
* ~USICNT2 -- USI bit count
* ~USICNT1 -- USI bit count
* ~USICNT0 -- USI bit count
*
* Note: ~<BIT> indicates that <BIT> has value zero
*/
USICNT = USI16B;
/* Enable USI */
USICTL0 &= ~USISWRST;
} |
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