//state machine==============================
always @ (STATE or LED[0])
begin
case(STATE)
IDLE : if(LED[0])
NEXT = WRITE_1;
else
NEXT = IDLE ;
WRITE_1 : NEXT = WRITE_2;
WRITE_2 :
NEXT = WRITE_1;
default : NEXT = IDLE ;
endcase
end
//registe the state
always @(posedge HCLK or negedge KEY)
if(!KEY)
STATE <= IDLE;
else
STATE <= NEXT;
always @(posedge HCLK or negedge KEY)
begin
LED[0] <=1'b1;
if(!KEY)
begin
RDY[1] <=1'b1;
RDY[0] <=1'b1;
// LED[0] <=1'b1;
end
else
case(STATE)
IDLE : begin
RDY[0] <= 1;
RDY[1] <= 1;
end
WRITE_1 : begin
RDY[1] <= 1'b0;
RDY[0] <= 1'b1;
end
WRITE_2 : begin
RDY[1] <= 1'b1;
RDY[0] <= 1'b1;
end
endcase
这个是我的fpga控制68013的程序,fpga应该对68013进行怎样的控制呀?
end