Cypress CY8CPLC20主要特性

只看该作者 · 2011-12-7 21:41

Cypress 公司的CY8CPLC20是集成了动力线调制解调器PHY和网络协议堆栈的动力线通信（PLC）芯片，具有功能强大的哈佛架构处理器，其中的M8C处理器的速度高达24MHz，支持I2C频率50kHz，100kHz和400kHz，支持双向半双工通信。本文介绍了CY8CPLC20主要特性，逻辑方框图，物理层FSK调制解调器方框图，PSoC核方框图以及PLC CY3275 低压（LV）开发板主要特性，方框图和电路图。
The CY8CPLC20 is an integrated Powerline Communication (PLC) chip with the Powerline Modem PHY and Network Protocol Stack running on the same device. Apart from the PLC core, the CY8CPLC20 also offers Cypress’s revolutionary PSoC technology that enables system designers to integrate multiple functions on the chip.

只看该作者 · 2011-12-7 21:42

CY8CPLC20主要特性：

■ Powerline Communication Solution

❐ Integrated Powerline Modem PHY

❐ Frequency Shift Keying Modulation

❐ Configurable baud rates up to 2400 bps

❐ Powerline Optimized Network Protocol

❐ Integrates Data Link, Transport, and Network Layers

❐ Supports Bidirectional Half Duplex Communication

❐ 8-bit CRC Error Detection to Minimize Data Loss

❐ I2C enabled Powerline Application Layer

❐ Supports I2C Frequencies of 50, 100, and 400 kHz

❐ Reference Designs for 110V/240V AC and 12V/24V AC/DC Powerlines

❐ Reference Designs comply with CENELEC EN 50065-1:2001 and FCC Part 15

■ Powerful Harvard Architecture Processor

❐ M8C Processor Speeds to 24 MHz

❐ Two 8x8 Multiply, 32-Bit Accumulate

■ Programmable System Resources (PSoC® Blocks)

❐ 12 Rail-to-Rail Analog PSoC Blocks provide:

• Up to 14-Bit ADCs

• Up to 9-Bit DACs

• Programmable Gain Amplifiers

• Programmable Filters and Comparators

❐ 16 Digital PSoC Blocks provide:

• 8 to 32-Bit Timers, Counters, and PWMs

• CRC and PRS Modules

• Up to Four Full Duplex UARTs

• Multiple SPI™ Masters or Slaves

• Connectable to all GPIO Pins

❐ Complex Peripherals by Combining Blocks

■ Flexible On-Chip Memory

❐ 32 KB Flash Program Storage 50,000 Erase or Write Cycles

❐ 2 KB SRAM Data Storage

❐ EEPROM Emulation in Flash

■ Programmable Pin Configurations

❐ 25 mA Sink, 10 mA Source on all GPIO

❐ Pull Up, Pull Down, High Z, Strong, or Open Drain Drive Modes on all GPIO

❐ Up to 12 Analog Inputs on GPIO

❐ Configurable Interrupt on all GPIO

只看该作者 · 2011-12-7 21:42

■ Additional System Resources

❐ I2C Slave, Master, and Multi-Master to 400 kHz

❐ Watchdog and Sleep Timers

❐ User-Configurable Low Voltage Detection

❐ Integrated Supervisory Circuit

❐ On-Chip Precision Voltage Reference

■ Complete Development Tools

❐ Free Development Software (PSoC Designer™)

❐ Full Featured In-Circuit Emulator (ICE) and Programmer

❐ Full Speed Emulation

❐ Complex Breakpoint Structure

❐ 128 KB Trace Memory

❐ Complex Events

❐ C Compilers, Assembler, and Linker

只看该作者 · 2011-12-7 21:43

C Compilers, Assembler, and Linker

图1。CY8CPLC20逻辑方框图

图2。CY8CPLC20物理层FSK调制解调器方框图

图3。CY8CPLC20 PSoC核方框