NANO100系列那些外设支持PDMA功能?

发表于 2020-5-11 09:46

NANO100系列那些外设支持PDMA功能?有专业人士或者大神帮忙解答一下吗？规格书上没有写，例程里面也没有！提问那么多次，没有一次是能解决的，加代理商好友也全是拉着你买IC，还不帮你解决问题。感觉对论坛失去信心了，所有问题都没有人一起讨论，规格书出了问题也没有专业人士出来回答，也不知论坛有没有新唐MCU大神，反正在论坛提问那么多次，从来没见过

发表于 2020-5-11 09:56

发表于 2020-5-11 09:59

奔跑的牛发表于 2020-5-11 09:56

谢谢！

发表于 2020-5-11 22:23

另外可以在PDMA的头文件里看到那些可以。

发表于 2020-5-20 21:18

楼主新手啊，这BSP的例子里不是有几个例子吗，怎么说没有呢

发表于 2020-5-20 21:20

复制

/**************************************************************************//**

 * [url=home.php?mod=space&uid=288409]@file[/url]     main.c

 * [url=home.php?mod=space&uid=895143]@version[/url]  V1.00

 * $Revision: 3 $

 * $Date: 14/09/11 7:12p $

 * [url=home.php?mod=space&uid=247401]@brief[/url]    Demonstrate PDMA trigger DAC convert sine wave outputs.

 *

 * @note

 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.

*****************************************************************************/

#include <stdio.h>

#include "Nano100Series.h"



#define SINE_ARRAY_SIZE 63

const uint16_t a16Sine[SINE_ARRAY_SIZE] = {2047, 2251, 2453, 2651, 2844, 3028, 3202, 3365, 3515, 3650, 3769, 3871, 3954,

                                           4019, 4064, 4088, 4095, 4076, 4040, 3984, 3908, 3813, 3701, 3573, 3429, 3272,

                                           3102, 2921, 2732, 2536, 2335, 2132, 1927, 1724, 1523, 1328, 1141,  962,  794,

                                           639,  497,  371,  262,  171,   99,   45,   12,    0,    7,   35,   84,  151,

                                           238,  343,  465,  602,  754,  919, 1095, 1281, 1475, 1674, 1876

                                          };









/*---------------------------------------------------------------------------------------------------------*/

/* Init System Clock                                                                                       */

/*---------------------------------------------------------------------------------------------------------*/

void SYS_Init(void)

{

    /* Unlock protected registers */

    SYS_UnlockReg();



    /* Set HCLK source form HXT and HCLK source divide 1  */

    CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT,CLK_HCLK_CLK_DIVIDER(1));



    /* Enable external 12MHz HXT, 32KHz LXT and HIRC */

    CLK_EnableXtalRC(CLK_PWRCTL_HXT_EN_Msk | CLK_PWRCTL_LXT_EN_Msk | CLK_PWRCTL_HIRC_EN_Msk);



    /* Waiting for clock ready */

    CLK_WaitClockReady(CLK_CLKSTATUS_HXT_STB_Msk | CLK_CLKSTATUS_LXT_STB_Msk | CLK_CLKSTATUS_HIRC_STB_Msk);



    /*  Set HCLK frequency 42MHz */

    CLK_SetCoreClock(42000000);



    /* Enable IP clock */

    CLK_EnableModuleClock(UART0_MODULE);

    CLK_EnableModuleClock(TMR0_MODULE);



    /* Enable DAC clock */

    CLK->APBCLK |= CLK_APBCLK_DAC_EN_Msk;

    /* Enable DMA clock */

    CLK->AHBCLK |= CLK_AHBCLK_DMA_EN_Msk;



    /* Select IP clock source */

    CLK_SetModuleClock(UART0_MODULE,CLK_CLKSEL1_UART_S_HXT,CLK_UART_CLK_DIVIDER(1));



    /*---------------------------------------------------------------------------------------------------------*/

    /* Init I/O Multi-function                                                                                 */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Set PA multi-function pins for UART0 RXD and TXD */

    SYS->PB_L_MFP &= ~( SYS_PB_L_MFP_PB0_MFP_Msk | SYS_PB_L_MFP_PB1_MFP_Msk);

    SYS->PB_L_MFP |= (SYS_PB_L_MFP_PB0_MFP_UART0_RX | SYS_PB_L_MFP_PB1_MFP_UART0_TX );



    /* Set PC.6 multi-function pin for DAC channel 0 */

    SYS->PC_L_MFP &= ~(SYS_PC_L_MFP_PC6_MFP_Msk);

    SYS->PC_L_MFP |= SYS_PC_L_MFP_PC6_MFP_DA_OUT0;



    /* Disable digital input path for both PC.6 */

    GPIO_DISABLE_DIGITAL_PATH(PC, 1 << 6);



    /* Lock protected registers */

    SYS_LockReg();

}







int32_t main (void)

{



    /* Init System, IP clock and multi-function I/O

       In the end of SYS_Init() will issue SYS_LockReg()

       to lock protected register. If user want to write

       protected register, please issue SYS_UnlockReg()

       to unlock protected register if necessary */

    SYS_Init();



    /* Init UART0 for printf */

    UART_Open(UART0, 115200);



    printf("\nThis sample code demonstrate PDMA channel 1 trigger DAC channel 0 function.\n");



    // Enable DAC channel 0, trigger by PDMA.

    DAC_Open(DAC, 0, DAC_PDMA_TRIGGER);

    // DAC clock is 42MHz, update DAC output every 5 us, the stable time is 42 * 5 clocks

    DAC_SetDelayTime(DAC, 42 * 5);



    // Wait 'til both channels are ready

    while(DAC_IS_BUSY(DAC, 0) == 1);



    /* Configure  PDMA channel 1 to trigger DAC */

    PDMA_Open(1 << 1);

    PDMA_SetTransferCnt(1, PDMA_WIDTH_16, SINE_ARRAY_SIZE);

    // Set source to wrap around mode to generate sine wave continuously

    // Set destination to DAC DATA0 address.

    PDMA_SetTransferAddr(1, (uint32_t)a16Sine, PDMA_SAR_WRA, (uint32_t)&DAC->DATA0, PDMA_DAR_FIX);

    // Set channel 1 transfer mode to DAC channel 0 TX

    PDMA_SetTransferMode(1, PDMA_DAC0_TX, 0, 0);



    PDMA_Trigger(1);



    while(1);



}



/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/

发表于 2020-5-20 21:21

复制

/**************************************************************************//**

 * @file     main.c

 * @version  V2.10

 * $Date: 15/06/30 11:40a $

 * @brief    Use PDMA channel 4 to demonstrate memory to memory transfer.

 *

 * @note

 * Copyright (C) 2012 Nuvoton Technology Corp. All rights reserved.

 *

 ******************************************************************************/

#include <stdio.h>

#include "Nano100Series.h"



#define TEST_CH     4



uint32_t PDMA_TEST_LENGTH = 64;

uint8_t SrcArray[256];

uint8_t DestArray[256];

uint32_t volatile u32IsTestOver = 0;



/**

 * @brief       DMA IRQ

 *

 * @param       None

 *

 * [url=home.php?mod=space&uid=266161]@return[/url]      None

 *

 * [url=home.php?mod=space&uid=1543424]@Details[/url]     The DMA default IRQ, declared in startup_nano100series.s.

 */

void PDMA_IRQHandler(void)

{

    uint32_t status = PDMA_GET_INT_STATUS();



    if (status & 0x2)   /* CH1 */

    {

        if (PDMA_GET_CH_INT_STS(1) & 0x2)

            u32IsTestOver = 1;

        PDMA_CLR_CH_INT_FLAG(1, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x4)     /* CH2 */

    {

        if (PDMA_GET_CH_INT_STS(2) & 0x2)

            u32IsTestOver = 2;

        PDMA_CLR_CH_INT_FLAG(2, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x8)     /* CH3 */

    {

        if (PDMA_GET_CH_INT_STS(3) & 0x2)

            u32IsTestOver = 3;

        PDMA_CLR_CH_INT_FLAG(3, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x10)     /* CH4 */

    {

        if (PDMA_GET_CH_INT_STS(4) & 0x2)

            u32IsTestOver = 4;

        PDMA_CLR_CH_INT_FLAG(4, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x20)     /* CH5 */

    {

        if (PDMA_GET_CH_INT_STS(5) & 0x2)

            u32IsTestOver = 5;

        PDMA_CLR_CH_INT_FLAG(5, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x40)     /* CH6 */

    {

        if (PDMA_GET_CH_INT_STS(6) & 0x2)

            u32IsTestOver = 6;

        PDMA_CLR_CH_INT_FLAG(6, PDMA_ISR_TD_IS_Msk);

    }

    else

        printf("unknown interrupt !!\n");

}



void SYS_Init(void)

{

    /* Unlock protected registers */

    SYS_UnlockReg();



    /* Enable external 12MHz HXT */

    CLK_EnableXtalRC(CLK_PWRCTL_HXT_EN_Msk);

    CLK_EnablePLL(CLK_PLLCTL_PLL_SRC_HXT, 96000000);

    /* Waiting for clock ready */

    CLK_WaitClockReady(CLK_CLKSTATUS_HXT_STB_Msk | CLK_CLKSTATUS_PLL_STB_Msk);



    CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_PLL, CLK_HCLK_CLK_DIVIDER(3));



    CLK->AHBCLK |= CLK_AHBCLK_DMA_EN_Msk;

    /* Select IP clock source */

    CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_UART_CLK_DIVIDER(1));

    /* Enable IP clock */

    CLK_EnableModuleClock(UART0_MODULE);



    /*---------------------------------------------------------------------------------------------------------*/

    /* Init I/O Multi-function                                                                                 */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Set PA multi-function pins for UART0 RXD and TXD */

//    SYS->PA_H_MFP &= ~( SYS_PA_H_MFP_PA15_MFP_Msk | SYS_PA_H_MFP_PA14_MFP_Msk);

//    SYS->PA_H_MFP |= (SYS_PA_H_MFP_PA15_MFP_UART0_TX|SYS_PA_H_MFP_PA14_MFP_UART0_RX);

    SYS->PB_L_MFP &= ~( SYS_PB_L_MFP_PB0_MFP_Msk | SYS_PB_L_MFP_PB1_MFP_Msk);

    SYS->PB_L_MFP |= (SYS_PB_L_MFP_PB1_MFP_UART0_TX|SYS_PB_L_MFP_PB0_MFP_UART0_RX);



    /* Lock protected registers */

    SYS_LockReg();

}



void UART0_Init(void)

{

    /* Reset IP */

    SYS_ResetModule(UART0_RST);

    UART0->BAUD = 0x67;              /* Baud Rate:115200  OSC:12MHz */

    UART0->TLCTL = 0x03;             /* Character len is 8 bits */

}



/*---------------------------------------------------------------------------------------------------------*/

/* MAIN function                                                                                           */

/*---------------------------------------------------------------------------------------------------------*/

int main (void)

{

    /* Init System, IP clock and multi-function I/O */

    SYS_Init(); //In the end of SYS_Init() will issue SYS_LockReg() to lock protected register. If user want to write protected register, please issue SYS_UnlockReg() to unlock protected register.



    /* Init UART for printf */

    UART0_Init();



    printf("\n\nCPU [url=home.php?mod=space&uid=72445]@[/url] %dHz <%d>\n", SystemCoreClock, TEST_CH);



    printf("+--------------------------------------+ \n");

    printf("|    NANO100 PDMA Driver Sample Code   | \n");

    printf("+--------------------------------------+ \n");



    /* Open Channel 2 */

    PDMA_Open(1 << TEST_CH);

    PDMA_SetTransferCnt(TEST_CH, PDMA_WIDTH_32, PDMA_TEST_LENGTH);

    PDMA_SetTransferAddr(TEST_CH, (uint32_t)SrcArray, PDMA_SAR_INC, (uint32_t)DestArray, PDMA_DAR_INC);

    PDMA_SetTransferMode(TEST_CH, PDMA_MEM, 0, 0);

    PDMA_SetTimeOut(TEST_CH, 0, 0x5555);

    PDMA_EnableInt(TEST_CH, PDMA_IER_TD_IE_Msk);

    NVIC_EnableIRQ(PDMA_IRQn);

    u32IsTestOver = 0;

    PDMA_Trigger(TEST_CH);

    while(u32IsTestOver == 0);



    if (u32IsTestOver == TEST_CH)

        printf("test done...\n");



    PDMA_Close();

    while(1);

}

发表于 2020-5-20 21:22

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/**************************************************************************//**

 * @file     main.c

 * @version  V1.00

 * $Revision: 4 $

 * $Date: 14/09/11 5:46p $

 * @brief    Demonstrate PWM Capture function by using PWM0 channel 2 to capture the output of PWM0 channel 0 and move captured data to SRAM with PDMA.

 *

 * @note

 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.

*****************************************************************************/

#include <stdio.h>

#include "Nano100Series.h"



#define PDMA_CH 1

#define SAMPLE_CNT 32



uint16_t g_au16RxPDMADestination[SAMPLE_CNT];



volatile uint32_t g_u32PdmaTDoneInt;



void PDMA_IRQHandler(void)

{

    uint32_t status = PDMA_GET_INT_STATUS();



    if (status & 0x2)   /* CH1 */

    {

        if (PDMA_GET_CH_INT_STS(1) & 0x2)

            g_u32PdmaTDoneInt = 1;

        PDMA_CLR_CH_INT_FLAG(1, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x4)     /* CH2 */

    {

        if (PDMA_GET_CH_INT_STS(2) & 0x2)

            g_u32PdmaTDoneInt = 2;

        PDMA_CLR_CH_INT_FLAG(2, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x8)     /* CH3 */

    {

        if (PDMA_GET_CH_INT_STS(3) & 0x2)

            g_u32PdmaTDoneInt = 3;

        PDMA_CLR_CH_INT_FLAG(3, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x10)     /* CH4 */

    {

        if (PDMA_GET_CH_INT_STS(4) & 0x2)

            g_u32PdmaTDoneInt = 4;

        PDMA_CLR_CH_INT_FLAG(4, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x20)     /* CH5 */

    {

        if (PDMA_GET_CH_INT_STS(5) & 0x2)

            g_u32PdmaTDoneInt = 5;

        PDMA_CLR_CH_INT_FLAG(5, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x40)     /* CH6 */

    {

        if (PDMA_GET_CH_INT_STS(6) & 0x2)

            g_u32PdmaTDoneInt = 6;

        PDMA_CLR_CH_INT_FLAG(6, PDMA_ISR_TD_IS_Msk);

    }

    else

        printf("unknown interrupt !!\n");

}



/*---------------------------------------------------------------------------------------------------------*/

/* Init System Clock                                                                                       */

/*---------------------------------------------------------------------------------------------------------*/

void SYS_Init(void)

{

    /* Unlock protected registers */

    SYS_UnlockReg();



    /* Set HCLK source form HXT and HCLK source divide 1  */

    CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT,CLK_HCLK_CLK_DIVIDER(1));



    /* Enable external 12MHz HXT, 32KHz LXT and HIRC */

    CLK_EnableXtalRC(CLK_PWRCTL_HXT_EN_Msk | CLK_PWRCTL_LXT_EN_Msk | CLK_PWRCTL_HIRC_EN_Msk);



    /* Waiting for clock ready */

    CLK_WaitClockReady(CLK_CLKSTATUS_HXT_STB_Msk | CLK_CLKSTATUS_LXT_STB_Msk | CLK_CLKSTATUS_HIRC_STB_Msk);



    /*  Set HCLK frequency 42MHz */

    CLK_SetCoreClock(42000000);



    CLK->AHBCLK |= CLK_AHBCLK_DMA_EN_Msk;



    /* Enable IP clock */

    CLK_EnableModuleClock(UART0_MODULE);



    /* Enable PWM clock */

    CLK_EnableModuleClock(PWM0_CH01_MODULE);

    CLK_EnableModuleClock(PWM0_CH23_MODULE);



    /* Select IP clock source */

    CLK_SetModuleClock(UART0_MODULE,CLK_CLKSEL1_UART_S_HXT,CLK_UART_CLK_DIVIDER(1));



    /* Set HCLK as PWM clock source */

    CLK_SetModuleClock(PWM0_CH01_MODULE, CLK_CLKSEL1_PWM0_CH01_S_HCLK, 0);

    CLK_SetModuleClock(PWM0_CH23_MODULE, CLK_CLKSEL1_PWM0_CH23_S_HCLK, 0);





    /*---------------------------------------------------------------------------------------------------------*/

    /* Init I/O Multi-function                                                                                 */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Set PA multi-function pins for UART0 RXD and TXD */

    SYS->PB_L_MFP &= ~( SYS_PB_L_MFP_PB0_MFP_Msk | SYS_PB_L_MFP_PB1_MFP_Msk);

    SYS->PB_L_MFP |= (SYS_PB_L_MFP_PB0_MFP_UART0_RX | SYS_PB_L_MFP_PB1_MFP_UART0_TX );



    /* Set PB multi-function pins for Clock Output */

    SYS->PB_H_MFP = ( SYS->PB_H_MFP & ~SYS_PB_H_MFP_PB12_MFP_Msk ) |  SYS_PB_H_MFP_PB12_MFP_CKO;



    /* Set PA.12 and PA.14 multi-function pins for PWM channel 0 and 2 */

    SYS->PA_H_MFP = (SYS->PA_H_MFP & ~SYS_PA_H_MFP_PA12_MFP_Msk) | SYS_PA_H_MFP_PA12_MFP_PWM0_CH0;

    SYS->PA_H_MFP = (SYS->PA_H_MFP & ~SYS_PA_H_MFP_PA14_MFP_Msk) | SYS_PA_H_MFP_PA14_MFP_PWM0_CH2;



    /* Lock protected registers */

    SYS_LockReg();

}



void UART0_Init()

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init UART                                                                                               */

    /*---------------------------------------------------------------------------------------------------------*/

    UART_Open(UART0, 115200);

}



static void PDMA_INIT(void)

{

    uint32_t u32SrcAddr, u32DstAddr;



    /* Configure PDMA channel 1 to trigger PWM */

    PDMA_Open(1 << PDMA_CH);

    PDMA_SetTransferCnt(PDMA_CH, PDMA_WIDTH_16, SAMPLE_CNT);

    u32SrcAddr = (uint32_t)&PWM0->PDMACH2;

    u32DstAddr = (uint32_t)g_au16RxPDMADestination;

    PDMA_SetTransferAddr(PDMA_CH, u32SrcAddr, PDMA_SAR_FIX, u32DstAddr, PDMA_DAR_INC);

    PDMA_SetTimeOut(PDMA_CH, 0, 0x5555);

    PDMA_EnableInt(PDMA_CH, PDMA_IER_TD_IE_Msk);

    NVIC_EnableIRQ(PDMA_IRQn);



    /* Set PDMA Channel 1 for PWM0 channel 2, and start timeout counting */

    PDMA_SetTransferMode(PDMA_CH, PDMA_PWM0_CH2, 0, 0);



    PDMA_Trigger(PDMA_CH);

}



int32_t main (void)

{

    uint8_t i;



    /* Init System, IP clock and multi-function I/O

       In the end of SYS_Init() will issue SYS_LockReg()

       to lock protected register. If user want to write

       protected register, please issue SYS_UnlockReg()

       to unlock protected register if necessary */

    SYS_Init();



    /* Init UART to 115200-8n1 for print message */

    UART0_Init();



    printf("\nThis sample code demonstrates PWM captured data transferred by PDMA.\n");

    printf("PWM0 channel 2 will capture the output of PWM0 channel 0\n");

    printf("So, please connect GPIO port A12 with A14.\n");

    // PWM0 frequency is 25000Hz, duty 30%,

    PWM_ConfigOutputChannel(PWM0, 0, 25000, 30);



    // PWM2

    PWM_ConfigCaptureChannel(PWM0,2,50,0);



    // Enable output of channel 0

    PWM_EnableOutput(PWM0, PWM_CH_0_MASK);



    // Enable capture of channel 2

    PWM_EnableCapture(PWM0, PWM_CH_2_MASK);



    //Enable PWM channel 2 capture PDMA

    PWM_EnablePDMA(PWM0, 2, PWM_CAP_PDMA_RFORDER_R, PWM_RISING_FALLING_LATCH_PDMA_ENABLE);



    /* Configure PDMA channel 1 */

    PDMA_INIT();



    /* Clear destination buffer */

    for(i = 0; i < SAMPLE_CNT; i++)

        g_au16RxPDMADestination[i] = 0;



    // Start

    PWM_Start(PWM0, (PWM_CH_0_MASK|PWM_CH_2_MASK));



    /* Wait for PDMA transfer down */

    while(g_u32PdmaTDoneInt == 0);



    // Stop

    PWM_Stop (PWM0, (PWM_CH_0_MASK|PWM_CH_2_MASK));



    printf("Captured data is as below.\n");

    printf("(rising : falling)\n");

    for(i = 1; i < (SAMPLE_CNT  >> 1); i+=2)    // ignore first sampled data. it's wrong

    {

        printf("%d, %d : %d\n", i, g_au16RxPDMADestination[i], g_au16RxPDMADestination[i+1]);

    }



    while(1);





}



/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/

发表于 2020-5-20 21:22

复制

/**************************************************************************//**

 * @file     main.c

 * @version  V1.00

 * $Revision: 2 $

 * $Date: 14/09/09 8:57a $

 * @brief    Demonstrate the usage of PDMA transfer. One SPI interface

 *           is enabled in loopback mode. Two PDMA channels are used

 *           in this sample, one for transmit, the other for receive.

 *

 * @note

 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.

 *

 ******************************************************************************/

#include <stdio.h>

#include "Nano100Series.h"



#define PDMA_TEST_COUNT 16



uint32_t g_au32SrcData[PDMA_TEST_COUNT];

uint32_t g_au32DstData[PDMA_TEST_COUNT];

uint32_t volatile u32IsTestOver = 0;



void PDMA_IRQHandler(void)

{

    uint32_t status = PDMA_GET_INT_STATUS();



    if (status & 0x2)   /* done */

    {

        PDMA_CLR_CH_INT_FLAG(1, PDMA_ISR_TD_IS_Msk);

    }

    else if (status & 0x4)     /* done */

    {

        if (PDMA_GET_CH_INT_STS(2) & 0x2)

            u32IsTestOver = 1;

        PDMA_CLR_CH_INT_FLAG(2, PDMA_ISR_TD_IS_Msk);

    }

    else

        printf("unknown interrupt, status=0x%x !!\n", status);

}



void SYS_Init(void)

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init System Clock                                                                                       */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Unlock protected registers */

    SYS_UnlockReg();



    /* Set HCLK source form HXT and HCLK source divide 1  */

    CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT,CLK_HCLK_CLK_DIVIDER(1));



    /* Enable external 12MHz HXT, 32KHz LXT and HIRC */

    CLK_EnableXtalRC(CLK_PWRCTL_HXT_EN_Msk | CLK_PWRCTL_LXT_EN_Msk | CLK_PWRCTL_HIRC_EN_Msk);



    /* Waiting for clock ready */

    CLK_WaitClockReady(CLK_CLKSTATUS_HXT_STB_Msk | CLK_CLKSTATUS_LXT_STB_Msk | CLK_CLKSTATUS_HIRC_STB_Msk);



    /*  Set HCLK frequency 42MHz */

    CLK_SetCoreClock(42000000);



    /* Select IP clock source */

    CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HIRC, CLK_UART_CLK_DIVIDER(1));

    CLK_SetModuleClock(SPI0_MODULE, CLK_CLKSEL2_SPI0_S_HCLK, 0);



    /* Enable IP clock */

    CLK_EnableModuleClock(UART0_MODULE);

    CLK_EnableModuleClock(SPI0_MODULE);

    CLK_EnableModuleClock(DMA_MODULE);



    /* Update System Core Clock */

    /* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically. */

    SystemCoreClockUpdate();



    /*---------------------------------------------------------------------------------------------------------*/

    /* Init I/O Multi-function                                                                                 */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Set PA multi-function pins for UART0 RXD and TXD  */

    SYS->PA_H_MFP = (SYS_PA_H_MFP_PA14_MFP_UART0_RX | SYS_PA_H_MFP_PA15_MFP_UART0_TX);



    /* Set multi function pin for SPI0 */

    SYS->PC_L_MFP = (SYS_PC_L_MFP_PC0_MFP_SPI0_SS0 | SYS_PC_L_MFP_PC1_MFP_SPI0_SCLK | SYS_PC_L_MFP_PC2_MFP_SPI0_MISO0 | SYS_PC_L_MFP_PC3_MFP_SPI0_MOSI0);



    /* Lock protected registers */

    SYS_LockReg();

}



int main(void)

{

    uint32_t u32Err=0;

    uint32_t i;



    /* Init System, IP clock and multi-function I/O */

    SYS_Init();



    /* Init UART to 115200-8n1 for print message */

    UART_Open(UART0, 115200);



    /* Configure SPI0 as a master, MSB first, 32-bit transaction, SPI Mode-0 timing, clock is 2MHz */

    SPI_Open(SPI0, SPI_MASTER, SPI_MODE_0, 32, 2000000);



    /* Enable the automatic hardware slave select function. Select the SPI0_SS0 pin and configure as low-active. */

    SPI_EnableAutoSS(SPI0, SPI_SS0, SPI_SS0_ACTIVE_LOW);



    printf("\n\n");

    printf("+----------------------------------------------------------------------+\n");

    printf("|                     SPI with PDMA Sample Code                        |\n");

    printf("+----------------------------------------------------------------------+\n");

    printf("\n");



    printf("The I/O connection for SPI0 loopback:\n");

    printf("    SPI0_MISO(PC.2) <--> SPI0_MOSI(PC.3)\n\n\n");

    printf("Please connect SPI0 MISO and MOSI pin, and press any key to start transmission ...");

    getchar();

    printf("\n");



    for(i=0; i<PDMA_TEST_COUNT; i++)

        g_au32SrcData[i] = 0x55550000 + i;



    /* Open Channel 1 for SPI0 TX, channel 2 for SPI0 RX */

    PDMA_Open(3 << 1);



    /* Configure channel 1 */

    PDMA_SetTransferCnt(1, PDMA_WIDTH_32, PDMA_TEST_COUNT);

    PDMA_SetTransferAddr(1, (uint32_t)g_au32SrcData, PDMA_SAR_INC, (uint32_t)&SPI0->TX0, PDMA_DAR_FIX);

    PDMA_SetTimeOut(1, 0, 0x5555);

    PDMA_EnableInt(1, PDMA_IER_TD_IE_Msk);



    /* Configure channel 2 */

    PDMA_SetTransferCnt(2, PDMA_WIDTH_32, PDMA_TEST_COUNT);

    PDMA_SetTransferAddr(2, (uint32_t)&SPI0->RX0, PDMA_SAR_FIX, (uint32_t)g_au32DstData, PDMA_DAR_INC);

    PDMA_SetTimeOut(2, 0, 0x5555);

    PDMA_EnableInt(2, PDMA_IER_TD_IE_Msk);



    /* Set Channel 1 for SPI0 TX, channel 2 for SPI0 RX, and then start timeout counting */

    PDMA_SetTransferMode(1, PDMA_SPI0_TX, 0, 0);

    PDMA_SetTransferMode(2, PDMA_SPI0_RX, 0, 0);



    PDMA_Trigger(1);

    PDMA_Trigger(2);



    /* Enable PDMA IRQ */

    NVIC_EnableIRQ(PDMA_IRQn);



    /* Trigger PDMA */

    SPI_TRIGGER_RX_PDMA(SPI0);

    SPI_TRIGGER_TX_PDMA(SPI0);



    /* Wait for PDMA operation finish */

    while(u32IsTestOver == 0);



    /* Check PDMA status */

    if(u32IsTestOver != 1)

        printf("PDMA error !\n");



    /* Check Rx Data */

    for(i=0; i<PDMA_TEST_COUNT; i++)

    {

        if(g_au32SrcData[i] != g_au32DstData[i])

        {

            u32Err ++;

        }

    }



    if(u32Err)

        printf(" [FAIL]\n\n");

    else

        printf(" [PASS]\n\n");



    while(1);

}



/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/

发表于 2020-5-20 21:23

官方提供了大概这几个例子，你可以对比学习，会发现他们之间的共同点。

[技术问答] NANO100系列那些外设支持PDMA功能?

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