我最近也在用STM8L152C6的段试LCD显示功能，遇到了和此贴类似的问题，希望过来人指点指点，谢谢！
LCD是4个COM,20个SEG，1/4duty, 1/3bias我的配置代码如下：
void LCD_Configuration(void)
{
CLK_PeripheralClockConfig(CLK_Peripheral_LCD, ENABLE);
CLK_RTCClockConfig(CLK_RTCCLKSource_LSE, CLK_RTCCLKDiv_1);
LCD_Init(LCD_Prescaler_2, LCD_Divider_17, LCD_Duty_1_4,
LCD_Bias_1_3, LCD_VoltageSource_External);
LCD_PortMaskConfig(LCD_PortMaskRegister_0, 0xFF);
LCD_PortMaskConfig(LCD_PortMaskRegister_1, 0xFF);
LCD_PortMaskConfig(LCD_PortMaskRegister_2, 0x0F);
LCD_ContrastConfig(LCD_Contrast_Level_2);
LCD_DeadTimeConfig(LCD_DeadTime_0);
LCD_PulseOnDurationConfig(LCD_PulseOnDuration_0);
LCD_Cmd(ENABLE);
}
在主程序中驱动LCD显示字符，当我接手LCD屏后，测量COM0,COM1,COM2的波形，请看附件“接LCD屏时测得COM口波形”，此时的波形有很长的电容充放电时间，导致在某个duty时间内，电压处在0~1/3VCC范围,如果此时SEG波形也类似，就会导致某些像素点很微弱的点亮了，就出现鬼影。当我不接LCD，直接测量COM0，COM1，COM2波形，此时的波形就和datasheet上的理论波形接近。
然后我做了如下修改：
将 LCD_PulseOnDurationConfig(LCD_PulseOnDuration_0);
改成 LCD_PulseOnDurationConfig(LCD_PulseOnDuration_7);
datasheet上有这样一段话解释这句：
The PON[2:0] (Pulse ON duration) bits in the LCD_CR2 register configure the time during
which RL is enabled (see Figure 55) through a HD (high drive) when the levels of common
and segment lines change. A short drive time decreases power consumption, but displays
with high internal resistance may need a longer drive time to achieve a satisfactory contrast.
The RL divider can be always switched on using the HD bit in the LCD_CR2 register.
The HD switch follows the rules described below:
● If the HD bit and the PON[2:0] bits in the LCD_CR2 are reset, then HD switch is open.
● If the HD bit in the LCD_CR2 register is reset and the PON[2:0] bits in the LCD_CR2
are different from 00 then, the HD switch is closed during the number of pulses defined
in the PON[2:0] bits.
● If HD bit in the LCD_CR2 register is 1 then HD switch is always closed.
我这样修改后就是增加了驱动时间，从而达到了较满意的对比度，测试看波形和看显示效果，果然很好，显示基本满足要求，没有鬼影。但这段话中也说了，延长驱动时间，会导致功耗增加，而我们的产品对功耗要求很高，我对这样的解决方案无法接受。请过来人指点下，怎么解决这个问题。感激不尽！
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