STM32F411CE片子，将HSE设置为主时钟，配置出错。请大神看下。

只看该作者 · 2018-7-29 16:52

我想将外部时钟（HSE 8M）设置为系统主时钟。我是按照STM32F4固件库说明修改的，结果主时钟是HSI输出，不是HSE输出。请大神支出那么有问题？（前提晶振绝对可以起振的，用STM32CubeMX生成的工程测试过。）固件库是探索者学习板A盘中带着F4的库

代码如下：static void SetSysClock(void) 下合适我STM32F411CE的程序。
#elif defined (STM32F411xE)
#if defined (USE_HSE_BYPASS)
/******************************************************************************/
/*          PLL (clocked by HSE) used as System clock source             */
/******************************************************************************/
  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;

  /* Enable HSE and HSE BYPASS */
  RCC->CR |= ((uint32_t)RCC_CR_HSEON | RCC_CR_HSEBYP);

  /* Wait till HSE is ready and if Time out is reached exit */
  do
  {
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter++;
  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));

  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
  {
HSEStatus = (uint32_t)0x01;
  }
  else
  {
HSEStatus = (uint32_t)0x00;
  }

  if (HSEStatus == (uint32_t)0x01)
  {
/* Select regulator voltage output Scale 1 mode */
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;

/* HCLK = SYSCLK / 1*/
RCC->CFGR |= RCC_CFGR_HPRE_DIV1;

/* PCLK2 = HCLK / 2*/
RCC->CFGR |= RCC_CFGR_PPRE2_DIV1;

/* PCLK1 = HCLK / 2*/
RCC->CFGR |= RCC_CFGR_PPRE1_DIV2;

/* Configure the main PLL */
RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) |
               (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);

/* Enable the main PLL */
RCC->CR |= RCC_CR_PLLON;             //打开主PLL

/* Wait till the main PLL is ready */             //等待
while((RCC->CR & RCC_CR_PLLRDY) == 0)
{
}

/* Configure Flash prefetch, Instruction cache, Data cache and wait state */
FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_2WS;

/* Select the main PLL as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));             //清0
//       RCC->CFGR |= RCC_CFGR_SW_PLL;             //修改过的东西！！！！！！！！！！！！

      RCC->CFGR |= RCC_CFGR_SW_HSE;

/* Wait till the main PLL is used as system clock source */       //等待HSE就绪
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SW_HSE);//修改过的东西！！！！！！！！！！
{

}
  }
  else
  { /* If HSE fails to start-up, the application will have wrong clock
      configuration. User can add here some code to deal with this error */
  }

STM32F411CE片子， 将HSE设置为主时钟，配置出错。请大神看下。

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STM32F411CE片子，将HSE设置为主时钟，配置出错。请大神看下。