EMAC时钟输出为什么使用DDR

只看该作者 · 2012-2-16 16:18

下面是 EMAC 的RX_CLK, TX_CLK的输出，为什么要加DDR LOGIC，注释看的不太明白

// Drive client clocks off chip
// DDr logic is used for this purpose to ensure that clock routing/timing to the pin is
// balanced as part of the clock tree
assign not_rx_clk_int = ~(rx_clk_int);
assign not_tx_clk_int = ~(tx_clk_int);

ODDR2 rx_clk_ddr (
   .Q          (rx_clk),
   .C0          (rx_clk_int),
   .C1          (not_rx_clk_int),
   .CE          (1'b1),
   .D0          (1'b1),
   .D1          (1'b0),
   .R          (reset),
   .S          (1'b0)
);

ODDR2 tx_clk_ddr (
   .Q          (tx_clk),
   .C0          (tx_clk_int),
   .C1          (not_tx_clk_int),
   .CE          (1'b1),
   .D0          (1'b1),
   .D1          (1'b0),
   .R          (reset),
   .S          (1'b0)
);