//外部中断触发设置
typedef enum
{
EXTI_NULL_EDGE = 0, //关闭触发
EXTI_POS_EDGE = 1, //上升沿
EXTI_NEG_EDGE = 2, //下升沿
EXTI_BOTH_EDGE = 3, //双边沿
}EXTI_EDGE_TYPE;
//中断与事件线触发电平设置
typedef enum
{
EIRQ_NEG_EDGE = 0, //下升沿
EIRQ_POS_EDGE = 1, //上升沿
EIRQ_BOTH_EDGE = 2, //双边沿
EIRQ_LOW_LEVEL = 3, //低电平
}EIRQ_EDGE_TYPE;
//中断控制器的数字滤波设置
typedef enum
{
IRQ_FILTER_PCLK3 = 0, //滤波器采样时钟=PCLK3
IRQ_FILTER_PCLK3_8 = 1, //滤波器采样时钟=PCLK3/8
IRQ_FILTER_PCLK3_32 = 2, //滤波器采样时钟=PCLK3/32
IRQ_FILTER_PCLK3_64 = 3, //滤波器采样时钟=PCLK3/64
IRQ_FILTER_DISABLE = 4, //滤波器关闭
}EIRQ_FILTER_TYPE;
//中断源选择
typedef enum
{
SYS_INT_SWI_IRQ0 = 0u,
SYS_INT_SWI_IRQ1 = 1u,
SYS_INT_SWI_IRQ2 = 2u,
SYS_INT_SWI_IRQ3 = 3u,
SYS_INT_SWI_IRQ4 = 4u,
SYS_INT_SWI_IRQ5 = 5u,
SYS_INT_SWI_IRQ6 = 6u,
SYS_INT_SWI_IRQ7 = 7u,
SYS_INT_SWI_IRQ8 = 8u,
SYS_INT_SWI_IRQ9 = 9u,
SYS_INT_SWI_IRQ10 = 10u,
SYS_INT_SWI_IRQ11 = 11u,
SYS_INT_SWI_IRQ12 = 12u,
SYS_INT_SWI_IRQ13 = 13u,
SYS_INT_SWI_IRQ14 = 14u,
SYS_INT_SWI_IRQ15 = 15u,
SYS_INT_SWI_IRQ16 = 16u,
SYS_INT_SWI_IRQ17 = 17u,
SYS_INT_SWI_IRQ18 = 18u,
SYS_INT_SWI_IRQ19 = 19u,
SYS_INT_SWI_IRQ20 = 20u,
SYS_INT_SWI_IRQ21 = 21u,
SYS_INT_SWI_IRQ22 = 22u,
SYS_INT_SWI_IRQ23 = 23u,
SYS_INT_SWI_IRQ24 = 24u,
SYS_INT_SWI_IRQ25 = 25u,
SYS_INT_SWI_IRQ26 = 26u,
SYS_INT_SWI_IRQ27 = 27u,
SYS_INT_SWI_IRQ28 = 28u,
SYS_INT_SWI_IRQ29 = 29u,
SYS_INT_SWI_IRQ30 = 30u,
SYS_INT_SWI_IRQ31 = 31u,
// External Interrupt.
SYS_INT_EXTI_EIRQ0 = 0u,
SYS_INT_EXTI_EIRQ1 = 1u,
SYS_INT_EXTI_EIRQ2 = 2u,
SYS_INT_EXTI_EIRQ3 = 3u,
SYS_INT_EXTI_EIRQ4 = 4u,
SYS_INT_EXTI_EIRQ5 = 5u,
SYS_INT_EXTI_EIRQ6 = 6u,
SYS_INT_EXTI_EIRQ7 = 7u,
SYS_INT_EXTI_EIRQ8 = 8u,
SYS_INT_EXTI_EIRQ9 = 9u,
SYS_INT_EXTI_EIRQ10 = 10u,
SYS_INT_EXTI_EIRQ11 = 11u,
SYS_INT_EXTI_EIRQ12 = 12u,
SYS_INT_EXTI_EIRQ13 = 13u,
SYS_INT_EXTI_EIRQ14 = 14u,
SYS_INT_EXTI_EIRQ15 = 15u,
// DMAC
SYS_INT_DMA1_TC0 = 32u,
SYS_INT_DMA1_TC1 = 33u,
SYS_INT_DMA1_TC2 = 34u,
SYS_INT_DMA1_TC3 = 35u,
SYS_INT_DMA2_TC0 = 36u,
SYS_INT_DMA2_TC1 = 37u,
SYS_INT_DMA2_TC2 = 38u,
SYS_INT_DMA2_TC3 = 39u,
SYS_INT_DMA1_BTC0 = 40u,
SYS_INT_DMA1_BTC1 = 41u,
SYS_INT_DMA1_BTC2 = 42u,
SYS_INT_DMA1_BTC3 = 43u,
SYS_INT_DMA2_BTC0 = 44u,
SYS_INT_DMA2_BTC1 = 45u,
SYS_INT_DMA2_BTC2 = 46u,
SYS_INT_DMA2_BTC3 = 47u,
SYS_INT_DMA1_ERR = 48u,
SYS_INT_DMA2_ERR = 49u,
// EFM
SYS_INT_EFM_PEERR = 50u,
SYS_INT_EFM_COLERR = 51u,
SYS_INT_EFM_OPTEND = 52u,
// QSPI
SYS_INT_QSPI_INTR = 54u,
// DCU
SYS_INT_DCU1 = 55u,
SYS_INT_DCU2 = 56u,
SYS_INT_DCU3 = 57u,
SYS_INT_DCU4 = 58u,
// TIMER 0
SYS_INT_TMR01_GCMA = 64u,
SYS_INT_TMR01_GCMB = 65u,
SYS_INT_TMR02_GCMA = 66u,
SYS_INT_TMR02_GCMB = 67u,
// RTC
SYS_INT_RTC_ALM = 81u,
SYS_INT_RTC_PRD = 82u,
// XTAL32 stop
SYS_INT_XTAL32_STOP = 84u,
// XTAL stop
SYS_INT_XTAL_STOP = 85u,
// wake-up timer
SYS_INT_WKTM_PRD = 86u,
// SWDT
SYS_INT_SWDT_REFUDF = 87u,
// TIMER 6
SYS_INT_TMR61_GCMA = 96u,
SYS_INT_TMR61_GCMB = 97u,
SYS_INT_TMR61_GCMC = 98u,
SYS_INT_TMR61_GCMD = 99u,
SYS_INT_TMR61_GCME = 100u,
SYS_INT_TMR61_GCMF = 101u,
SYS_INT_TMR61_GOVF = 102u,
SYS_INT_TMR61_GUDF = 103u,
SYS_INT_TMR61_GDTE = 104u,
SYS_INT_TMR61_SCMA = 107u,
SYS_INT_TMR61_SCMB = 108u,
SYS_INT_TMR62_GCMA = 112u,
SYS_INT_TMR62_GCMB = 113u,
SYS_INT_TMR62_GCMC = 114u,
SYS_INT_TMR62_GCMD = 115u,
SYS_INT_TMR62_GCME = 116u,
SYS_INT_TMR62_GCMF = 117u,
SYS_INT_TMR62_GOVF = 118u,
SYS_INT_TMR62_GUDF = 119u,
SYS_INT_TMR62_GDTE = 120u,
SYS_INT_TMR62_SCMA = 123u,
SYS_INT_TMR62_SCMB = 124u,
SYS_INT_TMR63_GCMA = 128u,
SYS_INT_TMR63_GCMB = 129u,
SYS_INT_TMR63_GCMC = 130u,
SYS_INT_TMR63_GCMD = 131u,
SYS_INT_TMR63_GCME = 132u,
SYS_INT_TMR63_GCMF = 133u,
SYS_INT_TMR63_GOVF = 134u,
SYS_INT_TMR63_GUDF = 135u,
SYS_INT_TMR63_GDTE = 136u,
SYS_INT_TMR63_SCMA = 139u,
SYS_INT_TMR63_SCMB = 140u,
// TIMER A
SYS_INT_TMRA1_OVF = 256u,
SYS_INT_TMRA1_UDF = 257u,
SYS_INT_TMRA1_CMP = 258u,
SYS_INT_TMRA2_OVF = 259u,
SYS_INT_TMRA2_UDF = 260u,
SYS_INT_TMRA2_CMP = 261u,
SYS_INT_TMRA3_OVF = 262u,
SYS_INT_TMRA3_UDF = 263u,
SYS_INT_TMRA3_CMP = 264u,
SYS_INT_TMRA4_OVF = 265u,
SYS_INT_TMRA4_UDF = 266u,
SYS_INT_TMRA4_CMP = 267u,
SYS_INT_TMRA5_OVF = 268u,
SYS_INT_TMRA5_UDF = 269u,
SYS_INT_TMRA5_CMP = 270u,
SYS_INT_TMRA6_OVF = 272u,
SYS_INT_TMRA6_UDF = 273u,
SYS_INT_TMRA6_CMP = 274u,
// USB FS
SYS_INT_USBFS_GLB = 275u,
// USRAT
SYS_INT_USART1_EI = 278u,
SYS_INT_USART1_RI = 279u,
SYS_INT_USART1_TI = 280u,
SYS_INT_USART1_TCI = 281u,
SYS_INT_USART1_RTO = 282u,
SYS_INT_USART1_WUPI = 432u,
SYS_INT_USART2_EI = 283u,
SYS_INT_USART2_RI = 284u,
SYS_INT_USART2_TI = 285u,
SYS_INT_USART2_TCI = 286u,
SYS_INT_USART2_RTO = 287u,
SYS_INT_USART3_EI = 288u,
SYS_INT_USART3_RI = 289u,
SYS_INT_USART3_TI = 290u,
SYS_INT_USART3_TCI = 291u,
SYS_INT_USART3_RTO = 292u,
SYS_INT_USART4_EI = 293u,
SYS_INT_USART4_RI = 294u,
SYS_INT_USART4_TI = 295u,
SYS_INT_USART4_TCI = 296u,
SYS_INT_USART4_RTO = 297u,
// SPI
SYS_INT_SPI1_SRRI = 299u,
SYS_INT_SPI1_SRTI = 300u,
SYS_INT_SPI1_SPII = 301u,
SYS_INT_SPI1_SPEI = 302u,
SYS_INT_SPI2_SRRI = 304u,
SYS_INT_SPI2_SRTI = 305u,
SYS_INT_SPI2_SPII = 306u,
SYS_INT_SPI2_SPEI = 307u,
SYS_INT_SPI3_SRRI = 309u,
SYS_INT_SPI3_SRTI = 310u,
SYS_INT_SPI3_SPII = 311u,
SYS_INT_SPI3_SPEI = 312u,
SYS_INT_SPI4_SRRI = 314u,
SYS_INT_SPI4_SRTI = 315u,
SYS_INT_SPI4_SPII = 316u,
SYS_INT_SPI4_SPEI = 317u,
//软件触发
SYS_INT_AOS_STRG = 319u,
// TIMER 4
SYS_INT_TMR41_GCMUH = 320u,
SYS_INT_TMR41_GCMUL = 321u,
SYS_INT_TMR41_GCMVH = 322u,
SYS_INT_TMR41_GCMVL = 323u,
SYS_INT_TMR41_GCMWH = 324u,
SYS_INT_TMR41_GCMWL = 325u,
SYS_INT_TMR41_GOVF = 326u,
SYS_INT_TMR41_GUDF = 327u,
SYS_INT_TMR41_RLOU = 328u,
SYS_INT_TMR41_RLOV = 329u,
SYS_INT_TMR41_RLOW = 330u,
SYS_INT_TMR42_GCMUH = 336u,
SYS_INT_TMR42_GCMUL = 337u,
SYS_INT_TMR42_GCMVH = 338u,
SYS_INT_TMR42_GCMVL = 339u,
SYS_INT_TMR42_GCMWH = 340u,
SYS_INT_TMR42_GCMWL = 341u,
SYS_INT_TMR42_GOVF = 342u,
SYS_INT_TMR42_GUDF = 343u,
SYS_INT_TMR42_RLOU = 344u,
SYS_INT_TMR42_RLOV = 345u,
SYS_INT_TMR42_RLOW = 346u,
SYS_INT_TMR43_GCMUH = 352u,
SYS_INT_TMR43_GCMUL = 353u,
SYS_INT_TMR43_GCMVH = 354u,
SYS_INT_TMR43_GCMVL = 355u,
SYS_INT_TMR43_GCMWH = 356u,
SYS_INT_TMR43_GCMWL = 357u,
SYS_INT_TMR43_GOVF = 358u,
SYS_INT_TMR43_GUDF = 359u,
SYS_INT_TMR43_RLOU = 360u,
SYS_INT_TMR43_RLOV = 361u,
SYS_INT_TMR43_RLOW = 362u,
// EMB
SYS_INT_EMB_GR0 = 390u,
SYS_INT_EMB_GR1 = 391u,
SYS_INT_EMB_GR2 = 392u,
SYS_INT_EMB_GR3 = 393u,
// EVENT PORT
SYS_INT_EVENT_PORT1 = 394u,
SYS_INT_EVENT_PORT2 = 395u,
SYS_INT_EVENT_PORT3 = 396u,
SYS_INT_EVENT_PORT4 = 397u,
// I2S
SYS_INT_I2S1_TXIRQOUT = 400u,
SYS_INT_I2S1_RXIRQOUT = 401u,
SYS_INT_I2S1_ERRIRQOUT = 402u,
SYS_INT_I2S2_TXIRQOUT = 403u,
SYS_INT_I2S2_RXIRQOUT = 404u,
SYS_INT_I2S2_ERRIRQOUT = 405u,
SYS_INT_I2S3_TXIRQOUT = 406u,
SYS_INT_I2S3_RXIRQOUT = 407u,
SYS_INT_I2S3_ERRIRQOUT = 408u,
SYS_INT_I2S4_TXIRQOUT = 409u,
SYS_INT_I2S4_RXIRQOUT = 410u,
SYS_INT_I2S4_ERRIRQOUT = 411u,
// COMPARATOR
SYS_INT_ACMP1 = 416u,
SYS_INT_ACMP2 = 417u,
SYS_INT_ACMP3 = 418u,
// I2C
SYS_INT_I2C1_RXI = 420u,
SYS_INT_I2C1_TXI = 421u,
SYS_INT_I2C1_TEI = 422u,
SYS_INT_I2C1_EE1 = 423u,
SYS_INT_I2C2_RXI = 424u,
SYS_INT_I2C2_TXI = 425u,
SYS_INT_I2C2_TEI = 426u,
SYS_INT_I2C2_EE1 = 427u,
SYS_INT_I2C3_RXI = 428u,
SYS_INT_I2C3_TXI = 429u,
SYS_INT_I2C3_TEI = 430u,
SYS_INT_I2C3_EE1 = 431u,
// PVD
SYS_INT_PVD_PVD1 = 433u,
SYS_INT_PVD_PVD2 = 434u,
// Temp. sensor
SYS_INT_OTS = 435u,
// FCM
SYS_INT_FCMFERRI = 436u,
SYS_INT_FCMMENDI = 437u,
SYS_INT_FCMCOVFI = 438u,
// WDT
SYS_INT_WDT_REFUDF = 439u,
// ADC
SYS_INT_ADC1_EOCA = 448u,
SYS_INT_ADC1_EOCB = 449u,
SYS_INT_ADC1_CHCMP = 450u,
SYS_INT_ADC1_SEQCMP = 451u,
SYS_INT_ADC2_EOCA = 452u,
SYS_INT_ADC2_EOCB = 453u,
SYS_INT_ADC2_CHCMP = 454u,
SYS_INT_ADC2_SEQCMP = 455u,
// TRNG
SYS_INT_TRNG_END = 456u,
// SDIOC
SYS_INT_SDIOC1_SD = 482u,
SYS_INT_SDIOC2_SD = 485u,
// CAN
SYS_INT_CAN_INT = 486u,
SYS_INT_MAX = 511u,
}INT_SOURCE_TYPE;
//EXTI线定义
typedef enum
{
EXTI_0 = 0, //EXTI0
EXTI_1 = 1, //EXTI1
EXTI_2 = 2, //EXTI2
EXTI_3 = 3, //EXTI3
EXTI_4 = 4, //EXTI4
EXTI_5 = 5, //EXTI5
EXTI_6 = 6, //EXTI6
EXTI_7 = 7, //EXTI7
EXTI_8 = 8, //EXTI8
EXTI_9 = 9, //EXTI9
EXTI_10 = 10, //EXTI10
EXTI_11 = 11, //EXTI11
EXTI_12 = 12, //EXTI12
EXTI_13 = 13, //EXTI13
EXTI_14 = 14, //EXTI14
EXTI_15 = 15, //EXTI15
}EXTI_TYPE;
//位带操作,实现51类似的GPIO控制功能
//具体实现思想,参考<<CM3权威指南>>第五章(87页~92页).M4同M3类似,只是寄存器地址变了.
//IO口操作宏定义
#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
#define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
//IO口地址映射
#define GPIOA_ODR_Addr (GPIOA_BASE+4)
#define GPIOB_ODR_Addr (GPIOB_BASE+4)
#define GPIOC_ODR_Addr (GPIOC_BASE+4)
#define GPIOD_ODR_Addr (GPIOD_BASE+4)
#define GPIOE_ODR_Addr (GPIOE_BASE+4)
#define GPIOH_ODR_Addr (GPIOH_BASE+4)
#define GPIOA_IDR_Addr (GPIOA_BASE+0)
#define GPIOB_IDR_Addr (GPIOB_BASE+0)
#define GPIOC_IDR_Addr (GPIOC_BASE+0)
#define GPIOD_IDR_Addr (GPIOD_BASE+0)
#define GPIOE_IDR_Addr (GPIOE_BASE+0)
#define GPIOH_IDR_Addr (GPIOH_BASE+0)
#endif //_HC32F46X_CONST_
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