[STM32F0] 关于SPI+DMA的使用问题

//    DMA_SetConfig(hdma_spi1_tx, SrcAddress, DstAddress, DataLength);

{

/* Clear all flags */

  hdma_spi1_tx.DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma_spi1_tx.ChannelIndex);



  /* Configure DMA Channel data length */

  hdma_spi1_tx.Instance->CNDTR = Size;



 /* Memory to Peripheral */

//  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)

  {

    /* Configure DMA Channel destination address */

    hdma_spi1_tx.Instance->CPAR = (uint32_t)&hspi->Instance->DR;



    /* Configure DMA Channel source address */

    hdma_spi1_tx.Instance->CMAR = (uint32_t)pTxData;

  }

} 

HAL_StatusTypeDef HAL_SPI_MY_TransmitReceive_DMA0(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,uint16_t Size)

{

  HAL_StatusTypeDef errorcode = HAL_OK;

  static uint8_t Flag=0;

  /* Process locked */

//  __HAL_LOCK(hspi);



  /* Reset the threshold bit */

  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX | SPI_CR2_LDMARX);



  /* Set fiforxthresold according the reception data length: 8bit */

  SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);



  /* Enable the Rx DMA Stream/Channel  */

//  HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)pRxData, Size);

{

/* Disable the peripheral */

          hdma_spi1_rx.Instance->CCR &= ~DMA_CCR_EN;

          

          /* Configure the source, destination address and the data length */  

//          DMA_SetConfig(hdma_spi1_rx, (uint32_t)&hspi->Instance->DR, (uint32_t)pRxData, Size);

{

/* Clear all flags */

  hdma_spi1_rx.DmaBaseAddress->IFCR  = (DMA_FLAG_GL1 << hdma_spi1_rx.ChannelIndex);

  

  /* Configure DMA Channel data length */

  hdma_spi1_rx.Instance->CNDTR = Size;

  

  /* Peripheral to Memory */

  {

    /* Configure DMA Channel source address */

    hdma_spi1_rx.Instance->CPAR = (uint32_t)&hspi->Instance->DR;

    

    /* Configure DMA Channel destination address */

    hdma_spi1_rx.Instance->CMAR = (uint32_t)pRxData;

  }

}

          /* Enable the transfer complete, & transfer error interrupts */

          /* Half transfer interrupt is optional: enable it only if associated callback is available */

      hdma_spi1_rx.Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);

          

          /* Enable the Peripheral */

          hdma_spi1_rx.Instance->CCR |= DMA_CCR_EN;



}

  

  /* Enable Rx DMA Request */

  SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);

  

  /* Enable the Tx DMA Stream/Channel  */

//  HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)pTxData, (uint32_t)&hspi->Instance->DR,Size);

{

/* Disable the peripheral */

          hdma_spi1_tx.Instance->CCR &= ~DMA_CCR_EN;

          

          /* Configure the source, destination address and the data length */  

//          DMA_SetConfig(hdma_spi1_rx, (uint32_t)&hspi->Instance->DR, (uint32_t)pRxData, Size);

{

/* Clear all flags */

  hdma_spi1_tx.DmaBaseAddress->IFCR  = (DMA_FLAG_GL1 << hdma_spi1_rx.ChannelIndex);

  

  /* Configure DMA Channel data length */

  hdma_spi1_tx.Instance->CNDTR = Size;

  

/* Memory to Peripheral */

  {   

    /* Configure DMA Channel destination address */

    hdma_spi1_tx.Instance->CPAR = (uint32_t)&hspi->Instance->DR;

    

    /* Configure DMA Channel source address */

    hdma_spi1_tx.Instance->CMAR = (uint32_t)pTxData;

  }

  

}

          /* Enable the transfer complete, & transfer error interrupts */

          /* Half transfer interrupt is optional: enable it only if associated callback is available */

      hdma_spi1_tx.Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);

 

          HAL_GPIO_WritePin(GPIOA, GPIO_PIN_15, GPIO_PIN_RESET);

          /* Enable the Peripheral */

          hdma_spi1_tx.Instance->CCR |= DMA_CCR_EN;



}

  /* Check if the SPI is already enabled */

  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)

  {

    /* Enable SPI peripheral */

    __HAL_SPI_ENABLE(hspi);

  }

  /* Enable the SPI Error Interrupt Bit */

  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));



  /* Enable Tx DMA Request */

  SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);



error :

  /* Process Unlocked */

//  __HAL_UNLOCK(hspi);

  return errorcode;

}