[ZT]FPGA design from scratch

只看该作者 · 2007-9-5 12:05

Part 20

    * Running our first simulation
    * Adding the DDR SDRAM
    * Suppressing assert messages in IEEE packages

只看该作者 · 2007-9-5 12:05

Part 21

* Debugging the simulation testbench
* The reset logic

只看该作者 · 2007-9-5 12:06

Part 22

    * Using the XPS software development kit (SDK)
    * Software development flow
    * GNU compiler collection (gcc)
    * Running SDK
    * Creating a new C appilcation project

只看该作者 · 2007-9-5 12:06

Part 23

    * Simulating program execution in the MicroBlaze processor
    * Verification strategy
    * Verification flow
    * Writing a simple c program
    * Loading the program
    * Running an NCSIM simulation
    * Simulation result
    * Compile and build the program inside SDK
    * Generate assembly code and hex code
    * Make a NCSIM memory load file
    * Running a simulation

只看该作者 · 2007-9-5 12:07

Part 24

    * System simulations
    * DDR SDRAM controller
    * LED displays and push buttons
    * OPB GPIO registers
    * Embedded test controller
    * Debugging the On-Chip Peripheral bus

只看该作者 · 2007-9-5 12:07

Part 25

    * Implementing the hardware platform
    * User constraints file
    * Setting up our constraints file
    * Specify pin constraints
    * Specify timing constraints
    * The implementation directory
    * Start bitstrem generation
    * Bitstream generation flow
    * Scriptfile to run XFlow
    * Bitstream generation result
    * Configuration of the FPGA
    * Using the platform cable USB
    * ML403 evaluation board
    * ML403 block diagram
    * Installing cable drivers
    * Xilinx JTAG tools on Linux without proprietary kernel modules
    * Setting up the USB cable
    * iMPACT FPGA configuration tool
    * Starting iMPACT

只看该作者 · 2007-9-5 12:08

Part 26

    * Using the iMPACT configuration tool
    * Boundary Scan and JTAG configuration
    * IEE standard 1149.1 (JTAG)
    * The identification register
    * Read IDCODE
    * Read the FPGA status register
    * Device configuration
    * Using Xilinx Platform Studio

只看该作者 · 2007-9-5 12:08

Part 27

    * Pin assignment closure process
    * PACE Pin and Area Constraint Editor
    * Running PACE
    * Topi the Top Code Generator
    * Topi setup
    * Using Topi to modify the Xilinx user constraints file
    * Xilinx Floorplanner
    * Viewing pin placement
    * Xilinx PlanAhead

只看该作者 · 2007-9-5 12:09

Part 28

    * Power calculations
    * XPower
    * Low power consumption

只看该作者 · 2007-9-5 12:09

Part 29

    * Hardware setup
    * Software setup
    * Download and execute a simple program
    * Download the bitstream
    * Get program size
    * Running the program

只看该作者 · 2007-9-5 12:10

Part 30

* Running demonstration software applications
* ML403 Reference Systemson the CD

只看该作者 · 2007-9-5 12:10

Part 31

    * Adding a 16x2 character LCD display
    * Set address range
    * Connecting ports
    * The easy way to add a new block
    * Configure the IP block
    * The LCD driver
    * LCD display timing
    * 8-bit write operation
    * Programming sequence
    * Display setup
    * More reading
    * Signal wiring on the ML403 board
    * Adding constraints
    * Generate netlist
    * Generate bitstream

只看该作者 · 2007-9-5 12:11

Part 32

    * Writing the "Hello World" program
    * SDK platform settings
    * C program build
    * C header files
    * The GPIO API definitions
    * C program examples
    * Device configuartion in SDK

只看该作者 · 2007-9-5 12:11

Part 33

    * Simulating the LCD driver
    * C program
    * Program execution (Waveform plot)
    * Generating the software libraries and BSPs
    * GNU compiler tools
    * Input files
    * Output files
    * Output from SDK build process
    * Display program size

只看该作者 · 2007-9-5 12:12

Part 34

    * Program disassembly
    * MicroBlaze software reference guide
    * System memory layout
    * Reset sequence
    * ELF file content
    * Startup files
    * First stage initialization files
    * Second stage initialization files

只看该作者 · 2007-9-5 12:12

Part 35

    * Generate simualtion HDL files
    * Simgen
    * Data2MEM memory tool
    * ETC_system_sim.bmm
    * ETC_system_init.vhd
    * ETC_system_tb.vhd
    * Modifying the testbench file
    * Compiling the BRAM initialization file
    * Compiling the testbench
    * Simulating program execution

只看该作者 · 2007-9-5 12:13

Part 36

    * The LCD driver (once more)
    * Editing the user constraints file
    * Generate new bitstream
    * Device configuration
    * Application program
    * Displaying "Hello World"

只看该作者 · 2007-9-5 12:13

Part 37

    * Debugging our design
    * Xilinx microprocessor debugger and GNU software debugging tools
    * Xilinx microprocessor debugger (XMD)
    * MicroBlaze processor target
    * MicroBlaze MDM hardware setup
    * Debug session
    * Reading registers in MicroBlaze
    * Load program
    * Set breakpoint
    * Remove breakpoint
    * Display breakpoints
    * Start program execution
    * Single step
    * Stop program execution
    * Display program code
    * Getting help
    * Using XMD in Xilinx Platform Studio

只看该作者 · 2007-9-5 12:14

Part 38

    * Writing software for our embedded system
    * Writing a software device driver
    * Software development overview
    * Device driver programmer guide
    * Platform specification format reference manual
    * Microprocessor Driver Definition (MDD)
    * Libraries and driver generation
    * Device driver architecture
    * xparameters.h
    * Software driver source code
    * Source code repository
    * Software device drivers used
    * SDK project directory
    * Header source files

只看该作者 · 2007-9-5 12:14

Part 39

    * Fixing our software driver
    * etc_v2_1_0.tcl
    * etc_v2_1_0.mdd
    * Makefile
    * xetc_g.c
    * xetc.h
    * xetc_l.h
    * Writing an application program
    * Print statements
    * Printout from program
    * Generate HDL simulation files
    * Generating the BRAM initialization file
    * Running a simulation

[ZT]FPGA design from scratch

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