（1）AT070TN92 LCD的驱动时序，见手册。以下为VHDL源码。 --***********************************************************
--
-- TFT LOGIC
--
-- Author:HanBiao
-- Date:2011-11-26
--Version:V000B000D000
--
--***********************************************************
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;
entity AT070TN92_DRV is
port
(
--***************************************************
--
-- TFT LCD INTERFACE
--
--***************************************************
R : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
G : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
B : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
DE : OUT STD_LOGIC;
HS : OUT STD_LOGIC;
VS : OUT STD_LOGIC;
DCLK : OUT STD_LOGIC;
MODE : OUT STD_LOGIC;
LR : OUT STD_LOGIC;
UD : OUT STD_LOGIC;
DITHB : OUT STD_LOGIC;
--***************************************************
--
-- TFT LCD INTERFACE
--
--***************************************************
BEEN : OUT STD_LOGIC;
TEST : OUT STD_LOGIC;
PWM_LCD : OUT STD_LOGIC;
K2 : IN STD_LOGIC;
K3 : IN STD_LOGIC;
K4 : IN STD_LOGIC;
CLK : IN STD_LOGIC;
RESET : IN STD_LOGIC
);
end entity;
architecture rtl of AT070TN92_DRV is
signal clk_div_5mhz : std_logic;
signal clk_div_10mhz : std_logic;
signal pol_temp : std_logic;
signal vsp_temp : std_logic;
signal vck_temp : std_logic;
signal HS_temp : std_logic;
signal VS_temp : std_logic;
signal DE_H : std_logic;
signal DE_V : std_logic;
signal h_data : std_logic_vector(23 downto 0);
signal v_data : std_logic_vector(23 downto 0);
signal lcd_data : std_logic_vector(23 downto 0);
signal SW_data : integer range 0 to 8;
signal pwm : std_logic;
constant thpw : integer := 22;
constant thb : integer := 22;
constant thd : integer := 800;
constant thfp : integer := 22;
constant th : integer := thpw + thb + thd + thfp; --1064
constant tvpw : integer := 11;
constant tvb : integer := 11;
constant tvd : integer := 480;
constant tvfp : integer := 11;
constant tv : integer := tvpw + tvb + tvd + tvfp; --528
signal x_cnt : integer range 0 to th + 100;
signal y_cnt : integer range 0 to tv + 100;
begin
DCLK <= CLK;
BEEN <= '1';
TEST <= clk_div_10mhz;
HS <= HS_temp;
VS <= VS_temp;
MODE <= '0';
LR <= '0';
UD <= '1';
DITHB <= '0';
DE <= DE_H and DE_V;
R <= h_data(23 downto 16);
G <= h_data(15 downto 8);
B <= h_data(7 downto 0);
PWM_LCD <= pwm;
--***************************************************
--
-- TFT LCD LOGIC
--
--***************************************************
process(CLK,RESET)is
variable pwm_cnt : integer range 0 to 90000;
begin
if(RESET = '0') then
x_cnt <= 0;
y_cnt <= 0;
pwm_cnt := 0;
elsif(CLK'event and CLK = '0') then
x_cnt <= x_cnt + 1;
if(x_cnt = th) then
x_cnt <= 0;
y_cnt <= y_cnt + 1;
if(y_cnt = tv) then
y_cnt <= 0;
end if;
end if;
pwm_cnt := pwm_cnt + 1;
if (pwm_cnt = 90000) then
pwm <= not pwm;
pwm_cnt := 0;
end if;
end if;
end process;
--***************************************************
--
-- TFT LCD LOGIC
--
--***************************************************
process(CLK,RESET)is
begin
if(RESET = '0') then
DE_H <= '0';
DE_V <= '0';
else
if(x_cnt >= thb + thpw) and (x_cnt <= thb + thpw + thd)then
DE_H <= '1';
else
DE_H <= '0';
end if;
if(y_cnt >= tvb + tvpw) and (y_cnt <= tvb + tvpw + tvd)then
DE_V <= '1';
else
DE_V <= '0';
end if;
end if;
end process;
--***************************************************
--
-- TFT LCD LOGIC
--
--***************************************************
process(CLK,RESET)is
begin
-- if(CLK'event and CLK = '1') then
if(RESET = '0') then
HS_temp <= '1';
VS_temp <= '0';
else
if(x_cnt >= thpw) then
HS_temp <= '1';
else
HS_temp <= '0';
end if;
if(y_cnt >= tvpw) then
VS_temp <= '1';
else
VS_temp <= '0';
end if;
end if;
-- end if;
end process;
--***************************************************
--
-- TFT LCD H Data LOGIC
--
--***************************************************
process(CLK,RESET)is
begin
if((x_cnt > thb + thpw) and (x_cnt <= thb + thpw + 100)
and (y_cnt >= tvb + tvpw) and (y_cnt <= tvb + tvpw + tvd))then
h_data <= "000000001111111111111111";
elsif((x_cnt > thb + thpw + 100) and (x_cnt <= thb + thpw + 200)
and (y_cnt >= tvb + tvpw) and (y_cnt <= tvb + tvpw + tvd))then
h_data <= "111111110000000011111111";
elsif((x_cnt > thb + thpw + 200) and (x_cnt <= thb + thpw + 300)
and (y_cnt >= tvb + tvpw) and (y_cnt <= tvb + tvpw + tvd))then
h_data <= "111111111111111100000000";
elsif((x_cnt > thb + thpw + 300) and (x_cnt <= thb + thpw + 400)
and (y_cnt >= tvb + tvpw) and (y_cnt <= tvb + tvpw + tvd))then
h_data <= "000000000000000011111111";
elsif((x_cnt > thb + thpw + 400) and (x_cnt <= thb + thpw + 500)
and (y_cnt >= tvb + tvpw) and (y_cnt <= tvb + tvpw + tvd))then
h_data <= "000000001111111111111111";
elsif((x_cnt > thb + thpw + 500) and (x_cnt <= thb + thpw + 600)
and (y_cnt >= tvb + tvpw) and (y_cnt <= tvb + tvpw + tvd))then
h_data <= "000000001111111100000000";
elsif((x_cnt > thb + thpw + 600) and (x_cnt <= thb + thpw + 700)
and (y_cnt >= tvb + tvpw) and (y_cnt <= tvb + tvpw + tvd))then
h_data <= "111111110000000011111111";
elsif((x_cnt > thb + thpw + 700) and (x_cnt <= thb + thpw + thd)
and (y_cnt >= tvb + tvpw) and (y_cnt <= tvb + tvpw + tvd))then
h_data <= "111111110000000000000000";
end if;
-- if((x_cnt >= thb + thpw) and (x_cnt <= thb + thpw + thd)
-- and (y_cnt > tvb + tvpw) and (y_cnt <= tvb + tvpw + 100))then
-- h_data <= "000000001111111111111111";
-- elsif((x_cnt >= thb + thpw) and (x_cnt <= thb + thpw + thd)
-- and (y_cnt > tvb + tvpw + 100) and (y_cnt <= tvb + tvpw + 200))then
-- h_data <= "111111100000000111111111";
-- elsif((x_cnt >= thb + thpw) and (x_cnt <= thb + thpw + thd)
-- and (y_cnt > tvb + tvpw + 100) and (y_cnt <= tvb + tvpw + 300))then
-- h_data <= "111111111111111100000000";
-- elsif((x_cnt >= thb + thpw) and (x_cnt <= thb + thpw + thd)
-- and (y_cnt > tvb + tvpw + 100) and (y_cnt <= tvb + tvpw + 400))then
-- h_data <= "000000001111111111111111";
-- elsif((x_cnt >= thb + thpw) and (x_cnt <= thb + thpw + thd)
-- and (y_cnt > tvb + tvpw + 100) and (y_cnt <= tvb + tvpw + tvd))then
-- h_data <= "111111100000000111111111";
-- end if;
end process;
end rtl;
（2）驱动实物见图片！
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